Re: Unichrome DRM ring buffer patch

[Erdi Chen]

This is a code snippet that reg_pause_addr:
    VGAOUT8(0x3c4, 0x38);
    device_id = VGAIN8(0x3c5) << 8;
    VGAOUT8(0x3c4, 0x37);
    device_id |= VGAIN8(0x3c5);
    switch (device_id) {
    case PCI_CHIP_CLE3122:
    case PCI_CHIP_CLE3022:
        pVia->Chipset = VIA_CLE266;
        pVia->reg_pause_addr = 0x418;
        break;
    case PCI_CHIP_VT7205:
    case PCI_CHIP_VT3205:
        pVia->Chipset = VIA_KM400;
        pVia->reg_pause_addr = 0x418;
        break;
    case PCI_CHIP_VT3204:
        pVia->Chipset = VIA_K8M800;
        pVia->reg_pause_addr = 0x418;
        break;
    case PCI_CHIP_VT3259:
        pVia->Chipset = VIA_PM800;
        pVia->reg_pause_addr = 0x40c;
        break;
    default:
        pVia->reg_pause_addr = 0x418;
        fprintf(stderr, "VIA: Unknown device ID (0x%x)\n", device_id);
    }
Thomas Hellström wrote:

Also had a guy at the unichrome lists that reported a kernel panic within
the via modules on a 2.4.20 kernel. I have checked on 2.6.3, and it seems
OK. Have you checked 2.4?
 

I just checked with 2.4.27 and it all seems OK. I will update the 
Unichrome project's
DDX to initialize the ring buffer for drm versions > 1.4.0.
Not sure whether his crash is due to my change of the drm minor version 
from 3 to 4.  Otherwise all my changes would not run when the ring 
buffer is not initialized.

What should reg_pause_addr be set to at init?
See above.
Regards
Thomas

BTW, Do you think it will be safe from a security point of view to let 
dri
clients still have read access to MMIO registers?
I think read access should be fine.
/Thomas
 


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