On Tue, 2005-01-11 at 09:01 -0500, Alex Deucher wrote:
> On Mon, 10 Jan 2005 23:41:55 -0500, Michel DÃnzer <[EMAIL PROTECTED]> wrote:
> > On Wed, 2005-01-05 at 09:27 -0500, Alex Deucher wrote:
> > > When crtc1 is at offset 0 pageflipping should work with a simple 
> > > patch to radeon_driver.c::RadeonDoAdjustframe().  the backbuffer 
> > > offset was being added to the base address after the crtc2_base info 
> > > was updated in the sarea.  That's an easy fix.
> > 
> > For what? radeon_cp_dispatch_flip() adds the offset before writing the
> > CRTC(2)_OFFSET registers?
> 
> you're right.

So is there still a problem with that?


> > > The problem is that in the drm in 
> > > radeon_state.c::radeon_cp_dispatch_flip() 
> > > the offset of crtc1 is calculated from the sarea frame info which 
> > > could be crtc1 or crtc2 depending on their orientation.  It should 
> > > really be calcluated in RadeonDoAdjustframe() just like crtc2 base.
> > 
> > Why don't you make sure the frame info is set the way the DRM expects it
> > instead?
> 
> That's a good idea.  The code in the drm should work fine with a small
> modification to the DDX, the problem is values in the in the sarea
> that get set in the DDX never make it to the drm.  I did some testing
> of this solution last night and the values I set in the DDX never make
> it to the drm.  I'm not sure why; I'm not yet that familiar with the
> drm.  Everything works fine if I hard code the offsets in the dispatch
> pageflip function in the drm.  Does any one have any ideas?

Apart from the potential AdjustFrame wrapping issues for the CRTC1 frame
info, I'm not sure; crtc2_base certainly worked fine for me when I
implemented it for the old clone mode. There's no other intervening
changes, e.g. modifying the SAREA layout incompatibly?


-- 
Earthling Michel DÃnzer      |     Debian (powerpc), X and DRI developer
Libre software enthusiast    |   http://svcs.affero.net/rm.php?r=daenzer


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