Roland Scheidegger wrote:
I don't quite follow third line before last? Can someone enlighten me?
You mean the pitch & 0x20 stuff? Yeah, looks strange.
Looking at it, it seems like it ensures that each "block line" starts with alternating 2KB addresses (i.e. that 11th-bit). So y 0-15 will have set that (for x 0-31) to 0, y 16-31 to 1 and so on.
Seems to me like it might be related to how the ram is organized (e.g. something like ensuring it's on a different memory channel or different bank or whatnot).
This is, btw, quite similarly strange to what Stephane needed on his rv100 to get the correct pixel address for color tiling, this one also tinkered with that 11th bit (see RadeonDoAdjustFrame).
Also, since Jacek is interested in depth tiling, I have to mention that on my rv100, the depth buffer is not tiled until you use hyperz.
Then when hyperz is used, the depth buffer becomes tiled. The depth tiling function is currently unknown (I still have to RE it) but it doesn't seem to work if I use the r100 or r200 depth tiling functions as defined in {radeon,r200}_span.c.
Generally if one could explain tiling a bit for me I would be grateful. What I'm trying to do is to is to modify depthOffset to be
as close to top-left corner of viewport as possible and modify. I this possible with shared depth buffer. This means that each 3D window would have different depthOffset but pointing to the same shared buffer.
I'm not sure if it's possible to do that with depthOffset (well maybe). There is however an interesting bit in RB3D_CNTL (R200_DEPTH_XZ_OFFEST_ENABLE, I guess "XZ" is a typo, just as is "OFFEST"?) and the corresponding (?) register (R200_RB3D_DEPTHXY_OFFSET), which sound to me like they are exactly invented for that...
Yes, AFAICT the same thing (private z buffers) should work on r100.
Now I think the real trouble with private z buffers is how these will interfere with hyperz...
Stephane
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