On Mon, 2005-03-14 at 02:39 +0200, Ville Syrjälä wrote: > On Sun, Mar 13, 2005 at 07:25:15PM -0500, Jon Smirl wrote: > > On Mon, 14 Mar 2005 10:48:19 +1100, Benjamin Herrenschmidt > > <[EMAIL PROTECTED]> wrote: > > > > > > > > That shouldn't matter the page brought in would be for a speculative > > > > > read and never accessed. It should just fall out of the cache and not > > > > > be written back. There is only one cachable mapping. In this model > > > > > writes are always followed by a flush before telling the GPU to access > > > > > the memory that has just been written. > > > > > > > > What about this scenario? > > > > > > > > Speculative read -> AGP master writes new data -> CPU has invalid data > > > > in > > > > cache :( > > > > > > > You need to reverse the cache flush process if you are going to read > > data written by the GPU. > > > > 1) Make sure GPU is finished writing > > 2) flush your cache > > 3) read AGP memory like normal RAM. > > Oh right. The CPU shouldn't write back the cached data since it hasn't > changed. > > I think you'd also need the GPU to issue an AGP flush command between > steps 1 and 2.
Not exactly, it could wait before 3) in fact. Step 2 will just "invalidate" the cache. Ben. ------------------------------------------------------- SF email is sponsored by - The IT Product Guide Read honest & candid reviews on hundreds of IT Products from real users. Discover which products truly live up to the hype. Start reading now. http://ads.osdn.com/?ad_ide95&alloc_id396&op=click -- _______________________________________________ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
