It's not only RADEON_LATENCY if i set PCI latency to 0xff i still got the lockup i am pretty disappointed as it seemed to be the winning register. Anyway here is a longer list of reg that may play role (i will try to find a place on the web to put the dump thus anyone interested could look at them too).
The palette register seems to be setup to safe default values : RADEON_PALETTE_DATA 0x00b4 RADEON_PALETTE_30_DATA 0x00b8 RADEON_PALETTE_INDEX 0x00b0 The CRTC status is different too (restarting xorg r300 after fglrx keep the change) RADEON_CRTC_STATUS Does the following differences means that the fglrx driver load another microcode ? RADEON_CP_ME_RAM_ADDR 0x07d4 RADEON_CP_ME_RAM_DATAL 0x07e0 The 0x180 and 0x154 are setups And the radeon : RADEON_BUS_CNTL There are others regs but they change from one run to another and don't seems to follow any rules (look random). The following reg cause a hardlockup when i try to read them : 0x0574 0x0d68 to 0x0f00 Jerome ------------------------------------------------------- This SF.Net email is sponsored by: NEC IT Guy Games. How far can you shotput a projector? How fast can you ride your desk chair down the office luge track? If you want to score the big prize, get to know the little guy. Play to win an NEC 61" plasma display: http://www.necitguy.com/?r -- _______________________________________________ Dri-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/dri-devel
