Hi!
Some comments for current implementations of VIA chipsets:
Jon Smirl wrote:
We should discuss the design of DRM maps so that we don't work at
cross purposes.
The register map should be marked read only or root only. I don't need
access to the register map.
A lot of syncing is done using direct register reads, both with OpenGL
and XvMC.
I'll be needing read-only.
4) Are there issues with sarea other than the one we talked about with XvMC?
Having thought a bit more about the SAREA problem, I'd like to see the
following solution:
1) AddMap returns an error if the flag CONTAINS_LOCK is not set. The
first SAREA otherwise for
backwards compatibility.
2) The device-specific code returns the number of possible SAREAS and
the size of each of them.
3) The first one (containing the lock) is created on init or on open for
backwards compatibility.
4) subsequent ones are requested and created by a new IOCTL taking the
sarea number as an argument. This IOCTL should be used also for future
user space access to the first sarea, since standard lookup will fail
if there are a number of SAREA maps greater than one. Refcount for
destruction of subsequent maps?
/Thomas
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