On Thu, 2005-08-04 at 07:25 -0700, Prashanth Hegde wrote: > I am using Radeon 9000 series graphics card. > I have this problem. I use indirect buffering for > submiiting packets to the GPU. Once I tell hardware > that I have placed the packet at some location, I need > to wait till it has finished processing it. > How do I know that the GPU has consumed all the > packets?. > > I can think of the following at this point: > > 1. After submission poll CP status till it becomes > idle > 2. Monitor the read/write pointers > 3. Update a location in memory( AGP aperture) via > scratch registers. This can be the last packet in the > submitted data.
That's how the radeon DRM does it, see RADEON_DISPATCH_AGE() and radeon_freelist_get(). Note that it currently indeed has the card write the scratch register contents back to AGP memory, but that's unreliable with some AGP bridges. It would be better to write to PCI memory instead. Fixing that would be a nice little project for someone who wants to get their hands dirty with the DRM. -- Earthling Michel Dänzer | Debian (powerpc), X and DRI developer Libre software enthusiast | http://svcs.affero.net/rm.php?r=daenzer ------------------------------------------------------- SF.Net email is Sponsored by the Better Software Conference & EXPO September 19-22, 2005 * San Francisco, CA * Development Lifecycle Practices Agile & Plan-Driven Development * Managing Projects & Teams * Testing & QA Security * Process Improvement & Measurement * http://www.sqe.com/bsce5sf -- _______________________________________________ Dri-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/dri-devel
