This is the patch series I've pushed to for-airlied for 2.6.28. It's similar to the previous IRQ patch series, but with the IMR -> IER change that had snuck in reverted. On non-MSI chipsets, twiddling IER apparently sometimes gets the interrupt wedged despite IIR=0, and the interrupt gets disabled shortly afterwards (easy way to reproduce on GM965: while true do glxgears&; sleep 10; killall glxgears; sleep 10; done).
Since we're leaving the pipestat interrupts unmasked all the time now (controlling them using the pipestat bits, not imr/ier), we shouldn't have any further pipe interrupt loss. I've been looping vblank_mode=2 openarena on GM965 and G45, and a mix of synced and unsynced glxgears on 915GM for the last half hour, and things are looking good. ------------------------------------------------------------------------- This SF.Net email is sponsored by the Moblin Your Move Developer's challenge Build the coolest Linux based applications with Moblin SDK & win great prizes Grand prize is a trip for two to an Open Source event anywhere in the world http://moblin-contest.org/redirect.php?banner_id=100&url=/ -- _______________________________________________ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
