On Thu, Apr 30, 2009 at 01:26:58PM -0700, Keith Packard wrote: > This makes software fallbacks not do tiling wrong on i965 and later after > resume. It also should fix 945 performance reduction after resume which > would have disabled tiling without causing any visible effect. > > Signed-off-by: Keith Packard <kei...@keithp.com> > --- > drivers/gpu/drm/i915/Makefile | 1 - > drivers/gpu/drm/i915/i915_drv.h | 7 +++++++ > drivers/gpu/drm/i915/i915_suspend.c | 24 ++++++++++++++++++++++++ > drivers/gpu/drm/i915/intel_display.c | 4 ++-- > 4 files changed, 33 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile > index 184b8bf..51c5a05 100644 > --- a/drivers/gpu/drm/i915/Makefile > +++ b/drivers/gpu/drm/i915/Makefile > @@ -13,7 +13,6 @@ i915-y := i915_drv.o i915_dma.o i915_irq.o i915_mem.o \ > intel_crt.o \ > intel_lvds.o \ > intel_bios.o \ > - intel_dp.o \ > intel_hdmi.o \ > intel_sdvo.o \ > intel_modes.o \ > > [...] > > diff --git a/drivers/gpu/drm/i915/intel_display.c > b/drivers/gpu/drm/i915/intel_display.c > index b6bedd9..761567f 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -1278,8 +1278,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, > > /* The Display Port M/N ratio needs to be set before the DPLL is enabled > */ > - if (is_dp) > - intel_dp_set_m_n(crtc, mode, adjusted_mode); > +// if (is_dp) > +// intel_dp_set_m_n(crtc, mode, adjusted_mode); > > I915_WRITE(fp_reg, fp); > I915_WRITE(dpll_reg, dpll);
o/~ one of these is not like the other Cheers, Daniel
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