On Sat, 02 May 2009 11:32:02 -0500
Robert Noland <rnol...@2hip.net> wrote:
> On Fri, 2009-02-06 at 10:22 -0800, Jesse Barnes wrote:
> > As discussed in the long thread about vblank related timeouts, it
> > turns out GM45 has different frame count registers than previous
> > chips. This patch adds support for them, which prevents us from
> > waiting on really stale sequence values in drm_wait_vblank (which
> > rather than returning immediately ends up timing out or getting
> > interrupted).
>
> I'm not seeing this patch in drm-next... It looks like this register
> should be used for all G4X chips, not just GM45. The counter on my
> G45 (2E22) was counting really fast using the old method. Using this
> register the values seem correct. The docs appear to hold up this
> argument as well I think (devELK).
>
> Running gears synced to vblank was working since vblanks just stay on.
> If vblanks are being switched on and off, (rotating the cube in
> compiz) I was seeing really bad behavior after a few minutes.
>
> Also note that in this case max_vblank_count is 32 bits, not 24. I'm
> setting that value at the same time that I set the function now.
Yes it should be for G4x. Patch below.
--
Initially, we thought just the GM45 had a different vblank counter
register, but now we now the same layout applies to all G4x chips, so
use the same get_vblank_counter function on the whole series.
Signed-off-by: Jesse Barnes <jbar...@virtuousgeek.org>
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 051134c..d84e4b0 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1153,7 +1153,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long
#endif
dev->driver->get_vblank_counter = i915_get_vblank_counter;
- if (IS_GM45(dev))
+ if (IS_G4X(dev))
dev->driver->get_vblank_counter = gm45_get_vblank_counter;
i915_gem_load(dev);
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