http://bugzilla.kernel.org/show_bug.cgi?id=13490





--- Comment #5 from Ben Gamari <bgam...@gmail.com>  2009-06-14 16:36:51 ---
I am fairly certain this is not a kernel issue. It looks like the problem is in
the userland driver (DDX). When the chip goes down the batch buffer head is
located at,

0x0c1db014: HEAD 0x54f08806: XY_SRC_COPY_BLT (rgb enabled, alpha enabled, src
tile 1, dst tile 1)
0x0c1db018: HEAD 0x03cc0780:    format 8888, dst pitch 1920, clipping disabled
0x0c1db01c: HEAD 0x04980766:    dst (1894,1176)
0x0c1db020: HEAD 0x04b00780:    dst (1920,1200)
0x0c1db024: HEAD 0x04331000:    dst offset 0x04331000
0x0c1db028: HEAD 0x04980766:    src (1894,1176)
0x0c1db02c: HEAD 0x00000780:    src pitch 1920
0x0c1db030: HEAD 0x06696000:    src offset 0x06696000

The dst and src offsets seem to be invalid given that tiling is enabled:

Destination Base Address: (base address of the destination surface: X=0, Y=0)
When Dest Tiling is enabled (Bit 11 enabled), this address is limited to
4Kbytes.

Source Base Address: (base address of the source surface: X=0, Y=0)
When Src Tiling is enabled (Bit 15 enabled), this address is limited to
4Kbytes.

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