Hello

While testing Linux kernel 2.6.30 on a Intel 855GME platform i noticed a
3 minute delay during the Linux boot process in the case DDC support is
not available.

I've tracked the problem down to the following lines in
driver/gpu/drm/i915/intel_crt.c:

 289                 /*
 290                  * Wait for the border to be displayed
 291                  */
 292                 while (I915_READ(pipe_dsl_reg) >= vactive)
 293                         ;
 294                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 295                         ;

The HW register pointed to by "pipe_dsl_reg" returns a constant value,
resulting in an endless loop at line 294.

For me this looks like some parts of the graphic engine is not correctly
set up yet, especially as the corresponding code in the Xorg Intel
graphics driver mentions that the "current pipe's DPLL" has to be active
for this code to work.

Or is this code designed to work in a graphic mode only, but not VGA
text mode?


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