http://bugzilla.kernel.org/show_bug.cgi?id=13973





--- Comment #3 from Daniel Vetter <dan...@ffwll.ch>  2009-10-14 08:06:58 ---
On Thu, Aug 13, 2009 at 10:54:06AM +0000, bugzilla-dae...@bugzilla.kernel.org
wrote:
> --- Comment #2 from Daniel Vetter <dan...@ffwll.ch>  2009-08-13 10:54:05 ---
> > --- Comment #1 from Michel Dänzer <mic...@daenzer.net>  2009-08-13 10:01:31 
> > ---
> > Does it work with radeon.agpmode=-1?
> Yes, this works around the problem and I get a usable console with it.

I've just tried recent -linus without agmode=-1, and it seems to work
fine. Is this simply due to the new backoff-logic in the driver (that
switches to pci mode if agp fails) or is the bug gone for real? dmesg of
loading radeon below:

[   29.968979] [drm] Initialized drm 1.1.0 20060810
[   30.051135] [drm] radeon kernel modesetting enabled.
[   30.057452] radeon 0000:05:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
[   30.073416] [drm] radeon: Initializing kernel modesetting.
[   30.080344] [drm] register mmio base: 0xFF5F0000
[   30.085596] [drm] register mmio size: 65536
[   30.096781] ATOM BIOS: 113
[   30.100312] [drm] GPU reset succeed (RBBM_STATUS=0x10000140)
[   30.106602] [drm] Generation 2 PCI interface, using max accessible memory
[   30.114039] agpgart-amd64 0000:04:00.0: AGP 3.0 bridge
[   30.120027] agpgart-amd64 0000:04:00.0: putting AGP V3 device into 4x mode
[   30.127538] radeon 0000:05:00.0: putting AGP V3 device into 4x mode
[   30.134441] [drm] radeon: VRAM 256M
[   30.138534] [drm] radeon: VRAM from 0x00000000 to 0x0FFFFFFF
[   30.144798] [drm] radeon: GTT 256M
[   30.148796] [drm] radeon: GTT from 0xC0000000 to 0xCFFFFFFF
[   30.155074] [drm] radeon: irq initialized.
[   30.160692] [drm] Detected VRAM RAM=256M, BAR=256M
[   30.166241] [drm] RAM width 256bits DDR
[   30.170845] [TTM] Zone  kernel: Available graphics memory: 2015160 kiB.
[   30.178138] [drm] radeon: 256M of VRAM memory ready
[   30.183632] [drm] radeon: 256M of GTT memory ready.
[   30.189191] [drm] GART: num cpu pages 65536, num gpu pages 65536
[   30.198276] [drm] radeon: 3 quad pipes, 1 z pipes initialized.
[   30.204837] [drm] radeon: cp idle (0x10000C03)
[   30.209995] [drm] Loading R500 Microcode
[   30.214539] platform radeon_cp.0: firmware: requesting radeon/R520_cp.bin
[   30.379272] [drm] radeon: ring at 0x00000000C0000000
[   30.384987] [drm] ring test succeeded in 1 usecs
[   30.405420] [drm] radeon: ib pool ready.
[   30.410193] [drm] ib test succeeded in 0 usecs
[   30.415725] [drm] Radeon Display Connectors
[   30.420529] [drm] Connector 0:
[   30.424192] [drm]   DVI-I
[   30.427438] [drm]   DDC: 0x7e40 0x7e40 0x7e44 0x7e44 0x7e48 0x7e48 0x7e4c
0x7e4c
[   30.435478] [drm]   Encoders:
[   30.439076] [drm]     CRT1: INTERNAL_KLDSCP_DAC1
[   30.444323] [drm]     DFP3: INTERNAL_LVTM1
[   30.449039] [drm] Connector 1:
[   30.452676] [drm]   S-video
[   30.456073] [drm]   Encoders:
[   30.459626] [drm]     TV1: INTERNAL_KLDSCP_DAC2
[   30.464752] [drm] Connector 2:
[   30.468414] [drm]   DVI-I
[   30.471620] [drm]   DDC: 0x7e50 0x7e50 0x7e54 0x7e54 0x7e58 0x7e58 0x7e5c
0x7e5c
[   30.479643] [drm]   Encoders:
[   30.483214] [drm]     CRT2: INTERNAL_KLDSCP_DAC2
[   30.488454] [drm]     DFP1: INTERNAL_KLDSCP_TMDS1
[   30.791893] [drm] fb mappable at 0xA0080000
[   30.796484] [drm] vram apper at 0xA0000000
[   30.800985] [drm] size 9216000
[   30.804450] [drm] fb depth is 24
[   30.808095] [drm]    pitch is 7680
[   30.834816] executing set pll
[   30.837023] executing set crtc timing
[   30.837069] [drm] TV-9: set mode 1280x1024 34
[   30.859807] executing set pll
[   30.862023] executing set crtc timing
[   30.862065] [drm] TMDS-11: set mode 1920x1200 35
[   30.902209] Console: switching to colour frame buffer device 160x64
[   30.967324] fb0: radeondrmfb frame buffer device
[   30.972454] registered panic notifier
[   30.976592] [drm] Initialized radeon 2.0.0 20080528 for 0000:05:00.0 on
minor 0
--
Daniel Vetter
Mail: dan...@ffwll.ch
Mobile: +41 (0)79 365 57 48

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