On Monday 14 December 2009, Jesse Barnes wrote:
> This patch removes the suspect portion of the dynamic clock control
> code. Hopefully it'll be as stable as powersave=0 in your config
> (assuming powersave=0 works :).
Ok, great! The machine is still running fine with powersave=0 so
far. I'll try your patch after some more uptime.
Arnd
> Jesse Barnes, Intel Open Source Technology Center
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_d
> index 279dc96..b8730de 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -3825,8 +3825,6 @@ void intel_decrease_renderclock(struct drm_device *dev)
> /* Down to minimum... */
> gcfgc &= ~GM45_GC_RENDER_CLOCK_MASK;
> gcfgc |= GM45_GC_RENDER_CLOCK_266_MHZ;
> -
> - pci_write_config_word(dev->pdev, GCFGC, gcfgc);
> } else if (IS_I965G(dev)) {
> u16 gcfgc;
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