From: Michel Dänzer <daen...@vmware.com>
The HDP read cache should only affect CPU reads from VRAM.
Signed-off-by: Michel Dänzer <daen...@vmware.com>
---
drivers/gpu/drm/radeon/radeon_gem.c | 12 ++++++++----
1 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_gem.c
b/drivers/gpu/drm/radeon/radeon_gem.c
index 60df2d7..188bf9b 100644
--- a/drivers/gpu/drm/radeon/radeon_gem.c
+++ b/drivers/gpu/drm/radeon/radeon_gem.c
@@ -125,13 +125,15 @@ int radeon_gem_set_domain(struct drm_gem_object *gobj,
return 0;
}
if (domain == RADEON_GEM_DOMAIN_CPU) {
+ uint32_t cur_placement;
/* Asking for cpu access wait for object idle */
- r = radeon_bo_wait(robj, NULL, false);
+ r = radeon_bo_wait(robj, &cur_placement, false);
if (r) {
printk(KERN_ERR "Failed to wait for object !\n");
return r;
}
- radeon_hdp_flush(robj->rdev);
+ if (cur_placement == TTM_PL_VRAM)
+ radeon_hdp_flush(robj->rdev);
}
return 0;
}
@@ -301,6 +303,7 @@ int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void
*data,
struct drm_radeon_gem_wait_idle *args = data;
struct drm_gem_object *gobj;
struct radeon_bo *robj;
+ uint32_t cur_placement = 0;
int r;
gobj = drm_gem_object_lookup(dev, filp, args->handle);
@@ -308,11 +311,12 @@ int radeon_gem_wait_idle_ioctl(struct drm_device *dev,
void *data,
return -EINVAL;
}
robj = gobj->driver_private;
- r = radeon_bo_wait(robj, NULL, false);
+ r = radeon_bo_wait(robj, &cur_placement, false);
mutex_lock(&dev->struct_mutex);
drm_gem_object_unreference(gobj);
mutex_unlock(&dev->struct_mutex);
- radeon_hdp_flush(robj->rdev);
+ if (cur_placement == TTM_PL_VRAM)
+ radeon_hdp_flush(robj->rdev);
return r;
}
--
1.6.5.7
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