On Wed, 2010-01-27 at 11:52 -0500, Alex Deucher wrote:
> 2010/1/27 Michel Dänzer <mic...@daenzer.net>:
> > On Wed, 2010-01-27 at 10:30 -0500, Alex Deucher wrote:
> >> 2010/1/27 Michel Dänzer <mic...@daenzer.net>:
> >> >
> >> > your commit 8131660130d3dc2629a150d47e6a04c8a1a6244b ('drm/radeon/kms:
> >> > add support for hw i2c on r1xx-r5xx') breaks LVDS on my PowerBook. It
> >> > looks kinda like blooming, though I can actually make out a higly
> >> > distorted part of what it's supposed to display, and there's a
> >> > panel/backlight blinking around every second or so.
> >> >
> >>
> >> Hmm, maybe the mac's edid is wired up such that hw i2c doesn't work or
> >> the prescale calculation for your system needs adjusting. Switching
> >> back to sw i2c should fix it in the meantime. Set the hw_capable bool
> >> in the radeon_i2c_bus_rec struct to false.
> >
> > Presumably that would work, as the previous commit ('drm/radeon/kms: add
> > radeon i2c algo') works? [0]
> >
> >> For the prescale:
> >> u32 prescale = (((rdev->clock.default_sclk * 10)/(4 * 128 * 100) + 1)
> >> << 8) + 128;
> >> does rdev->clock.default_sclk get initialized properly on the mac? If
> >> not, you can use radeon_get_engine_clock to read back the value from
> >> the regs.
> >
> > Looks like it in /sys/kernel/debug/dri/0/radeon_pm_info:
> >
> > state: PM_STATE_DISABLED
> > default engine clock: 445500 kHz
> > current engine clock: 445500 kHz
> > default memory clock: 240750 kHz
> > current memory clock: 240750 kHz
> >
>
> you could also try the prescale algo from r520:
> i2c_clock = 50;
> prescale = (127 << 8) + ((rdev->clock.default_sclk * 10) / (4 * 127 *
> i2c_clock));
Sorry I didn't have time to try your suggestions. However, I'm happy to
report that this problem is fixed in current drm-radeon-testing.
--
Earthling Michel Dänzer | http://www.vmware.com
Libre software enthusiast | Debian, X and DRI developer
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