2010/2/18 Rafał Miłecki <zaj...@gmail.com>:
> Signed-off-by: Rafał Miłecki <zaj...@gmail.com>
> ---
> V2: use already implemented functions for reading/writing PCIE PORT
> V3: fix rreg/wreg typo in macro
>
> Thanks Alex for reviewing!
> ---
> drivers/gpu/drm/radeon/r300.c | 5 ++++-
> drivers/gpu/drm/radeon/radeon.h | 2 ++
> drivers/gpu/drm/radeon/radeon_asic.h | 4 ++--
> drivers/gpu/drm/radeon/radeon_pm.c | 2 ++
> 4 files changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
> index 7e9f956..29ef9d8 100644
> --- a/drivers/gpu/drm/radeon/r300.c
> +++ b/drivers/gpu/drm/radeon/r300.c
> @@ -549,7 +549,10 @@ int rv370_get_pcie_lanes(struct radeon_device *rdev)
>
> /* FIXME wait for idle */
>
> - link_width_cntl = RREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL);
> + if (rdev->family < CHIP_R600)
> + link_width_cntl = RREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL);
> + else
> + link_width_cntl =
> RREG32_PCIE_P(RADEON_PCIE_LC_LINK_WIDTH_CNTL);
Since you also have a patch to implement setting the number of lanes,
it would be better to create a new r600 version of get_pcie_lanes()
since we may need other r6xx+ specific stuff in it.
Alex
>
> switch ((link_width_cntl & RADEON_PCIE_LC_LINK_WIDTH_RD_MASK) >>
> RADEON_PCIE_LC_LINK_WIDTH_RD_SHIFT) {
> case RADEON_PCIE_LC_LINK_WIDTH_X0:
> diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
> index b110994..ef55955 100644
> --- a/drivers/gpu/drm/radeon/radeon.h
> +++ b/drivers/gpu/drm/radeon/radeon.h
> @@ -1014,6 +1014,8 @@ static inline void r100_mm_wreg(struct radeon_device
> *rdev, uint32_t reg, uint32
> #define WREG32_MC(reg, v) rdev->mc_wreg(rdev, (reg), (v))
> #define RREG32_PCIE(reg) rv370_pcie_rreg(rdev, (reg))
> #define WREG32_PCIE(reg, v) rv370_pcie_wreg(rdev, (reg), (v))
> +#define RREG32_PCIE_P(reg) rdev->pciep_rreg(rdev, (reg))
> +#define WREG32_PCIE_P(reg, v) rdev->pciep_wreg(rdev, (reg), (v))
> #define WREG32_P(reg, val, mask) \
> do { \
> uint32_t tmp_ = RREG32(reg); \
> diff --git a/drivers/gpu/drm/radeon/radeon_asic.h
> b/drivers/gpu/drm/radeon/radeon_asic.h
> index b7030d7..4572a66 100644
> --- a/drivers/gpu/drm/radeon/radeon_asic.h
> +++ b/drivers/gpu/drm/radeon/radeon_asic.h
> @@ -626,7 +626,7 @@ static struct radeon_asic r600_asic = {
> .set_engine_clock = &radeon_atom_set_engine_clock,
> .get_memory_clock = &radeon_atom_get_memory_clock,
> .set_memory_clock = &radeon_atom_set_memory_clock,
> - .get_pcie_lanes = NULL,
> + .get_pcie_lanes = &rv370_get_pcie_lanes,
> .set_pcie_lanes = NULL,
> .set_clock_gating = NULL,
> .set_surface_reg = r600_set_surface_reg,
> @@ -672,7 +672,7 @@ static struct radeon_asic rv770_asic = {
> .set_engine_clock = &radeon_atom_set_engine_clock,
> .get_memory_clock = &radeon_atom_get_memory_clock,
> .set_memory_clock = &radeon_atom_set_memory_clock,
> - .get_pcie_lanes = NULL,
> + .get_pcie_lanes = &rv370_get_pcie_lanes,
> .set_pcie_lanes = NULL,
> .set_clock_gating = &radeon_atom_set_clock_gating,
> .set_surface_reg = r600_set_surface_reg,
> diff --git a/drivers/gpu/drm/radeon/radeon_pm.c
> b/drivers/gpu/drm/radeon/radeon_pm.c
> index f46d574..0602844 100644
> --- a/drivers/gpu/drm/radeon/radeon_pm.c
> +++ b/drivers/gpu/drm/radeon/radeon_pm.c
> @@ -442,6 +442,8 @@ static int radeon_debugfs_pm_info(struct seq_file *m,
> void *data)
> seq_printf(m, "default memory clock: %u0 kHz\n",
> rdev->clock.default_mclk);
> if (rdev->asic->get_memory_clock)
> seq_printf(m, "current memory clock: %u0 kHz\n",
> radeon_get_memory_clock(rdev));
> + if (rdev->asic->get_pcie_lanes)
> + seq_printf(m, "PCIE lanes: %d\n",
> radeon_get_pcie_lanes(rdev));
>
> return 0;
> }
> --
> 1.6.4.2
>
>
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