> Steven Stallion wrote: >>> Masa Murayama wrote: >>> >>>> ----- Original Message ----- >>>> >>>> >>>> Typical sparc IOMMU DVMA range is 0xff000000 - 0xffffffff, the highest >>>> 16Mbyte in PCI memory sparce. Threfore, PCI master devices *must* >>>> support the range for dma. >>>> >>>> Recently I saw the same message for BCM4401 driver on sparc, >>>> the divece only supports the dma range of 0x00000000 - 0x40000000, >>>> the lowest 1Gbyte. So bcm4401 doesn't work on sparc. >>>> >>>> >>> Right. An interesting data point about SPARC -- I had forgotten that >>> limitation. There are a few other devices I've run into in the past >>> that had this limitation. >>> >>> These days, it seems most device mfgr's understand that it is important >>> to support at least the full 32-bit address space, and more and more -- >>> the full 64-bit address space. >>> >> >> Thinking back, this does make a bit of sense. It seems odd that the >> RTL8029AS would not support the full 32-bit range of addressing, but >> then >> again, it doesn't support bus mastering either. >> > > If it doesn't support bus mastering, then you can't *really* use DMA. > At least not DMA like I thought you were talking about. (You can use > 3rd party DMA, but that becomes really hellish, and may not even be > portable. I've never seen 3rd party DMA used for anything except ISA > devices. Use PIO instead.) > > For all intents and purposes, DMA == bus mastering.
Agreed. I think half of the problem is the language used in the DP8390 specification is misleading (i.e. Remote DMA seems to be PIO, not DMA). It wasn't until last night that I noticed in the spec that the RTL8029AS ignores PCI_COMM_ME if set in the CSR. No sense in screwing with 3rd party DMA - I'll use PIO. > >> Is there a good place I can RTFM on PCI support in Solaris on SPARC and >> x86? I didn't know that SPARC had an addressing limitation for PCI >> devices >> - I would have thought the IOMMU could have handled that. >> > > Even an IOMMU has to deal with address limitations -- some of the > physical address space (PCI addresses) have to be available for PCI > register and on-device memory. (For example, framebuffers can wind up > chewing up a lot of the physical address space.) > > Address space is a finite resource. > > I'm not aware of any SPARC specific PCI FAQs. > Gotcha. Thanks again for the help! _______________________________________________ driver-discuss mailing list [email protected] http://mail.opensolaris.org/mailman/listinfo/driver-discuss
