This patch makes the LCD display clock polarity configurable via DT so in case
board needs different DISP_CLK clock polarity, it can use the 'pixelclk-active'
DT prop to do such adjustment.
Signed-off-by: Marek Vasut <ma...@denx.de>
Cc: Dave Airlie <airl...@gmail.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Cc: Philipp Zabel <p.za...@pengutronix.de>
Cc: Sascha Hauer <s.ha...@pengutronix.de>
Cc: Shawn Guo <shawn....@linaro.org>
---
drivers/staging/imx-drm/ipuv3-crtc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/staging/imx-drm/ipuv3-crtc.c
b/drivers/staging/imx-drm/ipuv3-crtc.c
index ce6ba98..1d8223e 100644
--- a/drivers/staging/imx-drm/ipuv3-crtc.c
+++ b/drivers/staging/imx-drm/ipuv3-crtc.c
@@ -157,7 +157,7 @@ static int ipu_crtc_mode_set(struct drm_crtc *crtc,
sig_cfg.Vsync_pol = 1;
sig_cfg.enable_pol = 1;
- sig_cfg.clk_pol = 1;
+ sig_cfg.clk_pol = !!(mode->flags & DRM_MODE_FLAG_PIXELCLK_NPOL);
sig_cfg.width = mode->hdisplay;
sig_cfg.height = mode->vdisplay;
sig_cfg.pixel_fmt = out_pixel_fmt;
--
1.8.4.2
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