For aesthetics, move the bit defines for this register and use the BIT macro to define the bits.
Signed-off-by: H Hartley Sweeten <[email protected]> Cc: Ian Abbott <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> --- drivers/staging/comedi/drivers/quatech_daqp_cs.c | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) diff --git a/drivers/staging/comedi/drivers/quatech_daqp_cs.c b/drivers/staging/comedi/drivers/quatech_daqp_cs.c index 8256615..29df086 100644 --- a/drivers/staging/comedi/drivers/quatech_daqp_cs.c +++ b/drivers/staging/comedi/drivers/quatech_daqp_cs.c @@ -78,6 +78,19 @@ #define DAQP_CTRL_TRIG_EDGE BIT(0) /* 0=rising; 1=falling */ #define DAQP_STATUS_REG 0x02 +#define DAQP_STATUS_IDLE BIT(7) +#define DAQP_STATUS_RUNNING BIT(6) +#define DAQP_STATUS_DATA_LOST BIT(5) +#define DAQP_STATUS_END_OF_SCAN BIT(4) +#define DAQP_STATUS_FIFO_THRESHOLD BIT(3) +#define DAQP_STATUS_FIFO_FULL BIT(2) +#define DAQP_STATUS_FIFO_NEARFULL BIT(1) +#define DAQP_STATUS_FIFO_EMPTY BIT(0) +/* these bits clear when the status register is read */ +#define DAQP_STATUS_EVENTS (DAQP_STATUS_DATA_LOST | \ + DAQP_STATUS_END_OF_SCAN | \ + DAQP_STATUS_FIFO_THRESHOLD) + #define DAQP_DI_REG 0x03 #define DAQP_DO_REG 0x03 #define DAQP_PACER_LOW_REG 0x04 @@ -88,16 +101,6 @@ #define DAQP_TIMER_REG 0x0a #define DAQP_AUX_REG 0x0f -#define DAQP_STATUS_IDLE 0x80 -#define DAQP_STATUS_RUNNING 0x40 -#define DAQP_STATUS_EVENTS 0x38 -#define DAQP_STATUS_DATA_LOST 0x20 -#define DAQP_STATUS_END_OF_SCAN 0x10 -#define DAQP_STATUS_FIFO_THRESHOLD 0x08 -#define DAQP_STATUS_FIFO_FULL 0x04 -#define DAQP_STATUS_FIFO_NEARFULL 0x02 -#define DAQP_STATUS_FIFO_EMPTY 0x01 - #define DAQP_COMMAND_ARM 0x80 #define DAQP_COMMAND_RSTF 0x40 #define DAQP_COMMAND_RSTQ 0x20 -- 2.5.1 _______________________________________________ devel mailing list [email protected] http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
