This improves spelling in the comment line to make things easier to get
for future rtl8188eu developers.
Fixes: 6c984c81fe27 (staging: r8188eu: Add files for new driver - part
12)
Signed-off-by: Wolfgang Hartmann <wolfgang.hartm...@siemens.com>
Signed-off-by: Manish Shrestha <manishshrestha2...@gmail.com>
Signed-off-by: Valentine Sinitsyn <valentine.sinit...@gmail.com>
---
drivers/staging/rtl8188eu/hal/odm_HWConfig.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/odm_HWConfig.c
b/drivers/staging/rtl8188eu/hal/odm_HWConfig.c
index 0555e42..5fcbe56 100644
--- a/drivers/staging/rtl8188eu/hal/odm_HWConfig.c
+++ b/drivers/staging/rtl8188eu/hal/odm_HWConfig.c
@@ -109,7 +109,7 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct
odm_dm_struct *dm_odm,
dm_odm->PhyDbgInfo.NumQryPhyStatusCCK++;
/* (1)Hardware does not provide RSSI for CCK */
- /* (2)PWDB, Average PWDB cacluated by hardware (for rate
adaptive) */
+ /* (2)PWDB, Average PWDB calculated by hardware (for rate
adaptive) */
cck_highpwr = dm_odm->bCckHighPower;
@@ -223,7 +223,7 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct
odm_dm_struct *dm_odm,
pPhyInfo->RxSNR[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
dm_odm->PhyDbgInfo.RxSNRdB[i] =
(s32)(pPhyStaRpt->path_rxsnr[i]/2);
}
- /* (2)PWDB, Average PWDB cacluated by hardware (for rate
adaptive) */
+ /* (2)PWDB, Average PWDB calculated by hardware (for rate
adaptive) */
rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1) &
0x7f) - 110;
PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
--
2.7.4
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