Hi Nicholas
On 4/6/19 5:01 AM, Nicholas Mc Guire wrote:
> External E-Mail
>
>
> usleep_range() is called in non-atomic context so there is little point
> in setting min==max the jitter of hrtimer is determined by interruptions
> anyway. usleep_range can only perform the intended coalescence if some
> room for placing the hrtimer is provided. Given the range of milliseconds
> the delay will be anything from 2 to a few anyway - so make it 2-5 ms.
>
> Signed-off-by: Nicholas Mc Guire <hof...@osadl.org>
> ---
>
> Problem located with an experimental coccinelle script
> ./drivers/staging/wilc1000/wilc_wlan.c:411:4-16: WARNING: inefficient
> usleep_range with range 0 (min==max)
> ./drivers/staging/wilc1000/wilc_wlan.c:426:4-16: WARNING: inefficient
> usleep_range with range 0 (min==max)
>
> Someone that knows the motivation for setting the time to 2 millisecond
> might need to check if the 2 milliseconds where seen as tollerable max or
> min - I'm assuming it was the min so extending.
>
> Patch was compile tested with: x86_64_defconfig + Staging=y,
> WILC1000_SDIO=m, WILC1000_SPI=m, WILC1000=m
>
> Patch is against 5.1-rc3 (localversion-next is -next-20190405)
>
> drivers/staging/wilc1000/wilc_wlan.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
This
> diff --git a/drivers/staging/wilc1000/wilc_wlan.c
> b/drivers/staging/wilc1000/wilc_wlan.c
> index c238969..42da533 100644
> --- a/drivers/staging/wilc1000/wilc_wlan.c
> +++ b/drivers/staging/wilc1000/wilc_wlan.c
> @@ -408,7 +408,7 @@ void chip_wakeup(struct wilc *wilc)
> wilc->hif_func->hif_write_reg(wilc, 1, reg & ~BIT(1));
>
> do {
> - usleep_range(2 * 1000, 2 * 1000);
> + usleep_range(2 * 1000, 5 * 1000);
> wilc_get_chipid(wilc, true);
> } while (wilc_get_chipid(wilc, true) == 0);
> } while (wilc_get_chipid(wilc, true) == 0);
> @@ -423,7 +423,7 @@ void chip_wakeup(struct wilc *wilc)
> &clk_status_reg);
>
> while ((clk_status_reg & 0x1) == 0) {
> - usleep_range(2 * 1000, 2 * 1000);
> + usleep_range(2 * 1000, 5 * 1000);
>
> wilc->hif_func->hif_read_reg(wilc, 0xf1,
> &clk_status_reg);
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