On Fri, Mar 20, 2020 at 06:10:56PM +0100, Oscar Carter wrote:
> -#define RSR_ADDRBROAD       0x80
> -#define RSR_ADDRMULTI       0x40
> +#define RSR_ADDRBROAD       BIT(7)
> +#define RSR_ADDRMULTI       BIT(6)
>  #define RSR_ADDRUNI         0x00
> -#define RSR_IVLDTYP         0x20        /* invalid packet type */
> -#define RSR_IVLDLEN         0x10        /* invalid len (> 2312 byte) */
> -#define RSR_BSSIDOK         0x08
> -#define RSR_CRCOK           0x04
> -#define RSR_BCNSSIDOK       0x02
> -#define RSR_ADDROK          0x01
> +#define RSR_IVLDTYP         BIT(5)   /* invalid packet type */
> +#define RSR_IVLDLEN         BIT(4)   /* invalid len (> 2312 byte) */
> +#define RSR_BSSIDOK         BIT(3)
> +#define RSR_CRCOK           BIT(2)
> +#define RSR_BCNSSIDOK       BIT(1)
> +#define RSR_ADDROK          BIT(0)

I like these ones because I do think the new version is more clear
now.

>  /* Bits in the EnhanceCFG_0 register */
>  #define EnCFG_BBType_a               0x00
> -#define EnCFG_BBType_b               0x01
> -#define EnCFG_BBType_g               0x02
> -#define EnCFG_BBType_MASK    0x03
> -#define EnCFG_ProtectMd              0x20
> +#define EnCFG_BBType_b               BIT(0)
> +#define EnCFG_BBType_g               BIT(1)
> +#define EnCFG_BBType_MASK    (BIT(0) | BIT(1))
> +#define EnCFG_ProtectMd              BIT(5)

Probably EnCFG_BBType_MASK should be defined using the other defines.

#define EnCFG_BBType_MASK (EnCFG_BBType_b | EnCFG_BBType_g)

Otherwise it looks good.  Can you change that one thing and then add
my Reviewed-by: Dan Carpenter <dan.carpen...@oracle.com>

regards,
dan carpenter

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