This is what we are doing today, but it is not correct.  The change in SP 
occurs before reaching the epilog label, so if the debugger halts on the branch 
instruction, for example, the debugger will use an incorrect SP value.

And this is just an example.  On deeper pipelined architectures, the separation 
of the predicated instructions originally in the epilog block could be much 
greater.

Thanks
Jon

-----Original Message-----
From: Michael Eager [mailto:[email protected]] 
Sent: Sunday, May 26, 2013 2:31 PM
To: Humphreys, Jonathan
Cc: [email protected]
Subject: Re: [Dwarf-Discuss] FDEs involving predicated instructions

It seems to me that you could indicate the change in SP at Epilog:, rather than 
the instruction before it.  Indeed, the change in SP doesn't happen unless you 
reach Epilog:.

On 04/22/2013 11:47 AM, Humphreys, Jonathan wrote:
> Sure, I'll use ARM as it's a pretty well-known processor.
>
> Suppose I have an epilog that consists of stack deallocation and a combined 
> SOE register save and return.  And suppose that the predecessor block will 
> conditionally fall through to the epilog.  So we have:
>
> continue:
>          ....
>          BEQ continue
> Epilog:
>          ...
>          ADD       SP, SP, #52
>          POP       {V1, V2, V3, V4, V5, V6, V7, V8, PC}
>
> Let's then say that the optimizer sees a stall in the predecessor block where 
> it can place the stack deallocation instruction.  But to move it into the 
> predecessor block, it must predicate the instruction so that it only executes 
> on the fall through path.  We then have:
>
> continue:
> ....
>          ADDNE     SP, SP, #52
>          BEQ continue
> Epilog:
>          ...
>          POP       {V1, V2, V3, V4, V5, V6, V7, V8, PC}
>
> In the unoptimized case, the compiler would put a DWARF directive after the 
> ADD instruction to indicate the CFA has changed by 52.  I cannot do the same 
> in the optimized case without also predicating the DWARF directive somehow.
>
> So my question is how do we support DWARF directives on predicated 
> instructions where the effect of the instruction may not happen, depending 
> upon some predicate or status register.
>
> I hope this helps.
> Thanks
> Jon
>
> -----Original Message-----
> From: Michael Eager [mailto:[email protected]]
> Sent: Friday, April 19, 2013 6:05 PM
> To: Humphreys, Jonathan
> Cc: [email protected]
> Subject: Re: [Dwarf-Discuss] FDEs involving predicated instructions
>
> On 04/19/2013 03:50 PM, Humphreys, Jonathan wrote:
>> I’m wondering the best way to handle predicated prolog/epilog 
>> instructions in the Call Frame Information.
>>
>> Suppose you have an epilog instruction that restores an SOE register 
>> and it is predicated and scheduled in a predecessor block.  How do 
>> you handle emitting an FDE rule that describes that a register is restored 
>> when a predicate or status register is a certain value?
>>
>> I can give an example if this isn’t clear.
>
> Yes, an example would be helpful.
>
>


-- 
Michael Eager    [email protected]
1960 Park Blvd., Palo Alto, CA 94306  650-325-8077

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