Branch: refs/heads/arm64/feature/semantics
  Home:   https://github.com/dyninst/dyninst
  Commit: fc0c0bb1209a2675c1f58d91323c2eef108387a5
      
https://github.com/dyninst/dyninst/commit/fc0c0bb1209a2675c1f58d91323c2eef108387a5
  Author: Xiaozhu Meng <xm...@cs.wisc.edu>
  Date:   2016-10-04 (Tue, 04 Oct 2016)

  Changed paths:
    M parseAPI/src/BoundFactCalculator.C
    M parseAPI/src/BoundFactData.C
    M parseAPI/src/BoundFactData.h
    M parseAPI/src/IndirectASTVisitor.C
    M parseAPI/src/IndirectASTVisitor.h
    M parseAPI/src/InstructionSource-aarch64.C
    M parseAPI/src/JumpTablePred.C

  Log Message:
  -----------
  1. Jump table contents can be first multiplied and then added to a jump base.
2. On ARMV8, the PC value is pre-instruction, while the PC value is 
post-instruction on x86/x64


  Commit: 9dca8456b22c71e7a8f791c1f780cacbc220f6fd
      
https://github.com/dyninst/dyninst/commit/9dca8456b22c71e7a8f791c1f780cacbc220f6fd
  Author: Sunny Shah <shahsunny...@gmail.com>
  Date:   2016-10-06 (Thu, 06 Oct 2016)

  Changed paths:
    M dataflowAPI/rose/semantics/DispatcherARM64.C

  Log Message:
  -----------
  Semantics for FMOV

Added semantics manaully for FMOV. Floating point operations ar enot yet 
supported; however, the variant of FMOV we are seeing in jump tables does 
nothing but move a value from a FP register to a general purpose register. To 
allow the analysis to continue, the semantics for this instruction are thus 
manually added for now.


  Commit: 9cc7caf1f421b1a8b44ba4d148844d0f3a0246c4
      
https://github.com/dyninst/dyninst/commit/9cc7caf1f421b1a8b44ba4d148844d0f3a0246c4
  Author: Xiaozhu Meng <xm...@cs.wisc.edu>
  Date:   2016-10-06 (Thu, 06 Oct 2016)

  Changed paths:
    M common/src/dyn_regs.C
    M dataflowAPI/rose/semantics/DispatcherARM64.C
    M dataflowAPI/rose/semantics/Registers.C
    M dataflowAPI/rose/semantics/SymEvalSemantics.C
    M external/rose/armv8InstructionEnum.h

  Log Message:
  -----------
  Merge branch 'arm64/feature/semantics' of /home/ssunny/dyninst/dyninst-code 
into upstream/arm64/feature/semantics


  Commit: 1a2e3427d8037e04861abd279a3958d279fc534f
      
https://github.com/dyninst/dyninst/commit/1a2e3427d8037e04861abd279a3958d279fc534f
  Author: Sunny Shah <shahsunny...@gmail.com>
  Date:   2016-10-11 (Tue, 11 Oct 2016)

  Changed paths:
    M dataflowAPI/src/ExpressionConversionVisitor.C
    M dataflowAPI/src/RoseImpl.C

  Log Message:
  -----------
  Bug fixes for converting Dyninst Instruction API objects to ROSE 
SgAsmInstruction objects for ARM64.

* RoseImpl.C: Fixed a bug that caused a stackoverflow when retrieving the 
SgAsmType of a SgAsmBinaryExpression
* ExpressionConversionVisitor.C: Fixed a typo (there was a && instead of &) 
that caused all registers to fall through to the call to getROSERegister (this 
should not be happening when the register is PSTATE)


  Commit: d4db8481e24a65455f0d6e62fbb4bfa7ea591776
      
https://github.com/dyninst/dyninst/commit/d4db8481e24a65455f0d6e62fbb4bfa7ea591776
  Author: Sunny Shah <shahsunny...@gmail.com>
  Date:   2016-10-11 (Tue, 11 Oct 2016)

  Changed paths:
    M dataflowAPI/rose/semantics/DispatcherARM64.C

  Log Message:
  -----------
  Modified implementation of DispatcherARM64::ConditionHolds()

The previous implementation did not make use of the fact the condition value in 
the expression can be retrieved as a raw integer value and does not have to be 
treated as a SValuePtr. Treating as an integer greatly simplifies assignment 
expression for all flags and also makes the code more readable.


  Commit: 3b09cd609324056777095b51e8bb1ebe9e80858b
      
https://github.com/dyninst/dyninst/commit/3b09cd609324056777095b51e8bb1ebe9e80858b
  Author: Xiaozhu Meng <xm...@cs.wisc.edu>
  Date:   2016-10-11 (Tue, 11 Oct 2016)

  Changed paths:
    M parseAPI/src/BoundFactCalculator.C
    M parseAPI/src/BoundFactData.C
    M parseAPI/src/IndirectASTVisitor.C
    M parseAPI/src/IndirectASTVisitor.h
    M parseAPI/src/IndirectAnalyzer.C
    M parseAPI/src/JumpTablePred.C

  Log Message:
  -----------
  1. Should delete alias AST when a part of it is assigned a new value.
2. Change Arch_x86 and Arch_x86_64 checking to use address width


  Commit: 3c8edd88e8567d8562f76ceb7345dbefb17f6e89
      
https://github.com/dyninst/dyninst/commit/3c8edd88e8567d8562f76ceb7345dbefb17f6e89
  Author: Sunny Shah <shahsunny...@gmail.com>
  Date:   2016-10-11 (Tue, 11 Oct 2016)

  Changed paths:
    M dataflowAPI/rose/semantics/DispatcherARM64.C

  Log Message:
  -----------
  Fixed typo that caused low bit to be gretaer than the high bit when 
extracting a value from an integer in DispatcherARM64::getRegSize()


Compare: https://github.com/dyninst/dyninst/compare/94beeb565c39...3c8edd88e856
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