Branch: refs/heads/thaines/x86_64_registers
Home: https://github.com/dyninst/dyninst
Commit: cc8c89910025099dd48a5a2491e257d0529e71ea
https://github.com/dyninst/dyninst/commit/cc8c89910025099dd48a5a2491e257d0529e71ea
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
Log Message:
-----------
Improve comments for register lengths
Commit: bec3d6fba4849dbc0f430631cc8bfd8d56344d42
https://github.com/dyninst/dyninst/commit/bec3d6fba4849dbc0f430631cc8bfd8d56344d42
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
M common/src/registers/MachRegister.C
Log Message:
-----------
Separate MMX/3DNow! and x87 register lengths
The MMX* registers are only the lower 64 bits of the st* ones.
Commit: 6cd2321092a6bd5560ba88c99878c3a2ace36593
https://github.com/dyninst/dyninst/commit/6cd2321092a6bd5560ba88c99878c3a2ace36593
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/src/registers/MachRegister.C
Log Message:
-----------
Fix x86_64 subrange mappings in MachRegister::getROSERegister
The values in the two namespaces are not the same.
Commit: d5ab568df87ab88c740350feaccd52dd48e6609b
https://github.com/dyninst/dyninst/commit/d5ab568df87ab88c740350feaccd52dd48e6609b
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/src/registers/MachRegister.C
Log Message:
-----------
Clean up size calculation in MachRegister
Commit: 7c5fa25fd1e68e9aae4ef681d80af6aee314e372
https://github.com/dyninst/dyninst/commit/7c5fa25fd1e68e9aae4ef681d80af6aee314e372
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
M common/src/registers/MachRegister.C
Log Message:
-----------
Separate MMX/3DNow! and x87 register categories
Commit: 6576e6aabbcaa61525984d020ea8a739a89113ce
https://github.com/dyninst/dyninst/commit/6576e6aabbcaa61525984d020ea8a739a89113ce
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
Log Message:
-----------
Reorder the length flags
This puts them in more of a chronological order.
Commit: 1a31432a89448e499dfe3b1802aba470fa3aa932
https://github.com/dyninst/dyninst/commit/1a31432a89448e499dfe3b1802aba470fa3aa932
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
Log Message:
-----------
Improve comments for register categories
Commit: cd8713792efc02121144a0e0aa5f6494b1bfda45
https://github.com/dyninst/dyninst/commit/cd8713792efc02121144a0e0aa5f6494b1bfda45
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
Log Message:
-----------
Reorder register categories
This puts them in more of a chronological order.
Commit: 7db45c41131f08d3c6a8ead139ab9ad6543dd0c9
https://github.com/dyninst/dyninst/commit/7db45c41131f08d3c6a8ead139ab9ad6543dd0c9
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
Log Message:
-----------
Move FLAGS ID down with the others.
Commit: 3b41f9d62045d5f51582f84da553f3921e45cc20
https://github.com/dyninst/dyninst/commit/3b41f9d62045d5f51582f84da553f3921e45cc20
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
Log Message:
-----------
Add comments for aliased GPRs
No real comments here. Just added a separator.
Commit: cad5f129ba14742bd8ec56ad380d85574843a69e
https://github.com/dyninst/dyninst/commit/cad5f129ba14742bd8ec56ad380d85574843a69e
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
Log Message:
-----------
Improve comments for EFLAGS fields
Commit: 12e6d8a014d01f5751646671b8536c08257ac1f8
https://github.com/dyninst/dyninst/commit/12e6d8a014d01f5751646671b8536c08257ac1f8
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
Log Message:
-----------
Move FLAGS ID
Commit: 5fad14851160ce3e4ef88c3030fd63a418426558
https://github.com/dyninst/dyninst/commit/5fad14851160ce3e4ef88c3030fd63a418426558
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
M common/src/registers/MachRegister.C
Log Message:
-----------
Use symbolic names for the segment register base IDs
Commit: b170728e0c22d6f80b94b0ac9ced77f6b168b4a3
https://github.com/dyninst/dyninst/commit/b170728e0c22d6f80b94b0ac9ced77f6b168b4a3
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
M common/src/registers/MachRegister.C
M dataflowAPI/src/SymEvalPolicy.C
Log Message:
-----------
Add missing flag1 from RFLAGS
Commit: e600e4acb667e52f761219542a52d221e9ce1ba4
https://github.com/dyninst/dyninst/commit/e600e4acb667e52f761219542a52d221e9ce1ba4
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
M common/src/registers/MachRegister.C
M dataflowAPI/src/SymEvalPolicy.C
Log Message:
-----------
Add missing flag3 from RFLAGS
Commit: 09aad724902cff563e4e8bfe759be4768c4e97d8
https://github.com/dyninst/dyninst/commit/09aad724902cff563e4e8bfe759be4768c4e97d8
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
M common/src/registers/MachRegister.C
M dataflowAPI/src/SymEvalPolicy.C
Log Message:
-----------
Add missing flag5 from RFLAGS
Commit: 099f7784a97b78ae61e373c72a9e4d815690fd4d
https://github.com/dyninst/dyninst/commit/099f7784a97b78ae61e373c72a9e4d815690fd4d
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
M common/src/registers/MachRegister.C
M dataflowAPI/src/SymEvalPolicy.C
Log Message:
-----------
Add missing flagc from RFLAGS
FLAGC is the lower bit of the I/O Permission Level field.
Commit: df830dbae735fc4146a432a6960bc066716586e2
https://github.com/dyninst/dyninst/commit/df830dbae735fc4146a432a6960bc066716586e2
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
M common/src/registers/MachRegister.C
M dataflowAPI/src/SymEvalPolicy.C
Log Message:
-----------
Add missing flagd from RFLAGS
FLAGC is the upper bit of the I/O Permission Level field.
Commit: f08c70176374816a528c20df9ca426b161a81803
https://github.com/dyninst/dyninst/commit/f08c70176374816a528c20df9ca426b161a81803
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
M common/src/registers/MachRegister.C
M dataflowAPI/src/SymEvalPolicy.C
Log Message:
-----------
Add missing flagf from RFLAGS
Commit: 34f7d4d66e49fd11e37241c4135851e5b350112c
https://github.com/dyninst/dyninst/commit/34f7d4d66e49fd11e37241c4135851e5b350112c
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
Log Message:
-----------
Improve comments about RFLAGS
Commit: c4ad1cebf0bd795780b1a0d18c8ba29e9f83ca99
https://github.com/dyninst/dyninst/commit/c4ad1cebf0bd795780b1a0d18c8ba29e9f83ca99
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
M common/src/registers/MachRegister.C
Log Message:
-----------
Add missing Virtual-8086 mode (VM) rFLAGS field
Commit: 8541ee44ed427176b4b18767589adf4f6caca5c2
https://github.com/dyninst/dyninst/commit/8541ee44ed427176b4b18767589adf4f6caca5c2
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/src/registers/MachRegister.C
Log Message:
-----------
Add conversion to ROSE register for Resume Flag
Commit: bda1658c2ffd25a453617734f7496aae0c501331
https://github.com/dyninst/dyninst/commit/bda1658c2ffd25a453617734f7496aae0c501331
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/src/registers/MachRegister.C
Log Message:
-----------
Add conversion to ROSE register for Nested Task flag
Commit: beff83c9439107f2f0c140dfb5db195c261cbb10
https://github.com/dyninst/dyninst/commit/beff83c9439107f2f0c140dfb5db195c261cbb10
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
M common/src/registers/MachRegister.C
Log Message:
-----------
Add missing Alignment Check/Access Control (AC) RFLAGS field
Commit: 3785de4bfa9662f32205d6a824bed0756f6ca439
https://github.com/dyninst/dyninst/commit/3785de4bfa9662f32205d6a824bed0756f6ca439
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
M common/src/registers/MachRegister.C
Log Message:
-----------
Add missing Virtual Interrupt Flag (VIF) RFLAGS field
Commit: c65bff0e3138f95e2298d680398cb808e667f19d
https://github.com/dyninst/dyninst/commit/c65bff0e3138f95e2298d680398cb808e667f19d
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
M common/src/registers/MachRegister.C
Log Message:
-----------
Add missing Virtual Interrupt Pending (VIP) RFLAGS field
Commit: 63140556a4eab8a2c8a55943c0f975f46ab3ee59
https://github.com/dyninst/dyninst/commit/63140556a4eab8a2c8a55943c0f975f46ab3ee59
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
M common/src/registers/MachRegister.C
Log Message:
-----------
Add missing ID Flag (ID) RFLAGS field
Commit: 6e3e00beaf72e8b44c6200913060448aacdcd397
https://github.com/dyninst/dyninst/commit/6e3e00beaf72e8b44c6200913060448aacdcd397
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
Log Message:
-----------
Improve descriptions in comment about format of constants
Commit: a9560aa4d8a472d163e0c2f235c553f221150095
https://github.com/dyninst/dyninst/commit/a9560aa4d8a472d163e0c2f235c553f221150095
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
M common/src/registers/MachRegister.C
Log Message:
-----------
Fix avx-512 opmask size.
It's 64 bits, not 128.
From Intel(R) 64 and IA-32 Architectures Software Developer’s Manual
June 2021
15.6.1 OPMASK Register to Predicate Vector Data Processing
The opmask is a set of eight architectural registers of size
MAX_KL (64-bit).
Commit: 2b8807f8274d8c6ff4a2143aa39fde642de09298
https://github.com/dyninst/dyninst/commit/2b8807f8274d8c6ff4a2143aa39fde642de09298
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
M common/src/registers/MachRegister.C
Log Message:
-----------
Rename OCT to XMMS
This makes it consistent with the names used for the other vector
extensions.
Commit: 2fcb03c13e7f6d0a3336f87b1e06bc42f8827bb5
https://github.com/dyninst/dyninst/commit/2fcb03c13e7f6d0a3336f87b1e06bc42f8827bb5
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
Log Message:
-----------
Reorder register declarations
It makes it easier to read.
Commit: a55ed05037f7d7cf2de6483f235ffda05ca23caa
https://github.com/dyninst/dyninst/commit/a55ed05037f7d7cf2de6483f235ffda05ca23caa
Author: Tim Haines <thaines.as...@gmail.com>
Date: 2023-11-17 (Fri, 17 Nov 2023)
Changed paths:
M common/h/registers/x86_64_regs.h
M common/src/registers/MachRegister.C
Log Message:
-----------
Add missing subranges in MachRegister::getROSERegister
Compare:
https://github.com/dyninst/dyninst/compare/cc8c89910025%5E...a55ed05037f7
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