Branch: refs/heads/angushe/riscv-capstone
Home: https://github.com/dyninst/dyninst
Commit: c0577a73560a43fd97e60aff1bb3be312dfe2015
https://github.com/dyninst/dyninst/commit/c0577a73560a43fd97e60aff1bb3be312dfe2015
Author: wxrdnx <wxr...@protonmail.com>
Date: 2024-06-03 (Mon, 03 Jun 2024)
Changed paths:
M common/h/entryIDs.h
M instructionAPI/capstone-interation.py
M instructionAPI/src/InstructionDecoder-Capstone-riscv64.C
M instructionAPI/src/InstructionDecoder-Capstone.C
Log Message:
-----------
fix missing instructions due to error parsing riscv instructions
Commit: 304d8a66168f5fc978b1adb1cdc07bd96575f86b
https://github.com/dyninst/dyninst/commit/304d8a66168f5fc978b1adb1cdc07bd96575f86b
Author: wxrdnx <wxr...@protonmail.com>
Date: 2024-06-04 (Tue, 04 Jun 2024)
Changed paths:
M common/h/entryIDs.h
Log Message:
-----------
fix previously incorrectly generated instructions
Commit: b881ea7230616b85352a70dce829328d9c53c3e8
https://github.com/dyninst/dyninst/commit/b881ea7230616b85352a70dce829328d9c53c3e8
Author: wxrdnx <wxr...@protonmail.com>
Date: 2024-06-04 (Tue, 04 Jun 2024)
Changed paths:
M common/h/dyn_regs.h
M instructionAPI/src/InstructionCategories.C
Log Message:
-----------
add missing registers and branch instructions
Commit: 8b9b5f1f69119c70efb03f66330795150d3da4e9
https://github.com/dyninst/dyninst/commit/8b9b5f1f69119c70efb03f66330795150d3da4e9
Author: wxrdnx <wxr...@protonmail.com>
Date: 2024-06-04 (Tue, 04 Jun 2024)
Changed paths:
M instructionAPI/src/InstructionDecoder-Capstone-riscv64.C
M instructionAPI/src/InstructionDecoder-Capstone.h
Log Message:
-----------
implement decodeOperands_riscv64
Compare: https://github.com/dyninst/dyninst/compare/d04a454175b5...8b9b5f1f6911
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