Branch: refs/heads/angushe/riscv-symtab-api
Home: https://github.com/dyninst/dyninst
Commit: 1eb4bf4c9b8a1fcceccf07b31d486405c234df06
https://github.com/dyninst/dyninst/commit/1eb4bf4c9b8a1fcceccf07b31d486405c234df06
Author: wxrdnx <wxr...@protonmail.com>
Date: 2024-12-21 (Sat, 21 Dec 2024)
Changed paths:
M common/CMakeLists.txt
M common/h/Architecture.h
M common/h/dyn_regs.h
M common/h/entryIDs.h
A common/h/mnemonics/riscv64_entryIDs.h
A common/h/registers/riscv64_regs.h
M common/src/registers/MachRegister.C
M dataflowAPI/src/ExpressionConversionVisitor.C
M dwarf/src/dwarfHandle.C
M elf/src/Elf_X.C
A external/rose/riscv64InstructionEnum.h
M instructionAPI/capstone/import_mnemonics.py
A instructionAPI/capstone/riscv64/mnemonics.py
A instructionAPI/capstone/riscv64/registers.py
M instructionAPI/src/interrupts.C
M instructionAPI/src/syscalls.C
M parseAPI/src/SymbolicExpression.C
M proccontrol/src/process.C
Log Message:
-----------
add RISC-V instruction mnemonics and registers
To unsubscribe from these emails, change your notification settings at
https://github.com/dyninst/dyninst/settings/notifications
_______________________________________________
Dyninst-api mailing list
Dyninst-api@cs.wisc.edu
https://lists.cs.wisc.edu/mailman/listinfo/dyninst-api
