Sorry for the top post...

When the driver is done preparing a DMA, the drivers write using a
writel or IGB_WRITE_REG to the TDT (transmit tail) register to indicate
to the hardware there is more data to fetch.  When the hardware
processes all the data it moves the TDH (transmit head) register and
interrupts (if the descriptors were set to do so) or writes the head
write back (HWB) memory location.

Hope that helps.

Also, you can download the 82575/82576 manual for the igb hardware from
e1000.sf.net download area.

-----Original Message-----
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On Behalf Of Roman
Chertov
Sent: Friday, July 25, 2008 12:20 PM
To: e1000-devel@lists.sourceforge.net
Subject: [E1000-devel] igb driver question

Hello,
    I am looking at the igb driver and I have a question regarding 
packet transmission.  I see that igb_xmit_frame_ring_adv is called by 
the stack to TX a packet.  In that function, the packet gets mapped to 
some TX descriptor and eventually gets sent to the card via DMA.  I am 
not clear as to which mechanism actually triggers the transmit.  Does 
the card automatically do so when it gets a DMA transfer and then 
invokes an interrupt to clear the TX ring?

Thanks in advance,

Roman Chertov

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