Hello there,
I post the message in Google before I found this nice mailing list. What we
try to do is taking advantages of
checksum offload provided by the 82574GbE chip (on both tx/rx sides), and
software does not need to verify the checksum. Hopefully it can improve the
performance of our software switch.
How we have several questions regarding to the Ethernet Controller, and
its linux driver provided by Intel
(e1000e-1.0.15.tar.gz), wish we can get some helps here.
1) If we enabled the Rx Side TCP Checksum offload, will the chip
report the TCP checksum status (error or no-error) for those packets
with VLAN tag? Can the chip report the TCP checksum errors for both
IPv4 and IPv6 TCP packets at same time (with RFCTL.IPv6_DIS and
RFCTL.IP6Xsum_DIS cleared)?
2) Can we enable CRC32, IP checksum, and TCP checksum offloads at
the same time ? So any of these error can be reported in the receive
descriptor through one or more of the CRC32, TCPE, or IPE bits.
3) If checksum offload is enabled on receive side, can the chip
still compute the packet checksum and report it on the receiver
descriptor ?
4) For the transmission side TCP checksum offload, does the e1000e
driver really support it? Can we use ethtool to enable TX side TCP
checksum offload, or it is configured by default?
Thanks,
HB
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