On Wed, Jul 21, 2010 at 09:22, Sonny Rao <[email protected]> wrote:
> From: Milton Miller <[email protected]>
>
> The PowerPC architecture does not require loads to independent bytes to be
> ordered without adding an explicit barrier.
>
> In ixgbe_clean_rx_irq we load the status bit then load the packet data.
> With packet split disabled if these loads go out of order we get a
> stale packet, but we will notice the bad sequence numbers and drop it.
>
> The problem occurs with packet split enabled where the TCP/IP header and data
> are in different descriptors. If the reads go out of order we may have data
> that doesn't match the TCP/IP header. Since we use hardware checksumming this
> bad data is never verified and it makes it all the way to the application.
>
> This bug was found during stress testing and adding this barrier has been 
> shown
> to fix it.  The bug can manifest as a data integrity issue (bad payload data)
> or as a BUG in skb_pull().
>
> This was a nasty bug to hunt down, if people agree with the fix I think
> it's a candidate for stable.
>
> Previously Submitted to e1000-devel only for ixgbe
>
> http://marc.info/?l=e1000-devel&m=126593062701537&w=3
>
> We've now seen this problem hit with other device drivers (e1000e mostly)
> So I'm resubmitting with fixes for other Intel Device Drivers with
> similar issues:  ixgb, e100, e1000, and e1000e
>
> Signed-off-by: Milton Miller <[email protected]>
> Signed-off-by: Anton Blanchard <[email protected]>
> Signed-off-by: Sonny Rao <[email protected]>
> cc: stable <[email protected]>
>

Thanks Milton, I have added the patch to my queue.

-- 
Cheers,
Jeff

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