Yes it is a Linux Driver.
The idea is to use fewer of the 128 queues in each port in the VMDq + DCB
mode. That way the kernel is happy to support those limited msix interrupts
required on each of the queues.
But this idea of mapping onto netdev is interesting. Are there more pointers
to it?
Can etthool show that 128 queues are enabled / available?
Thanks
Rama
On Tue, Jul 26, 2011 at 11:01 AM, Nelson, Shannon
<[email protected]>wrote:
> > From: Rama Puranam [mailto:[email protected]]
> > Sent: Monday, July 25, 2011 12:25 PM
> > To: [email protected]
> > Cc: Nelson, Shannon
> > Subject: Re: 128 Queue Support 82599
> >
> > Hi,
> >
> > Here is my use case:
> >
> > 1. I have 4 ports: A, B, C and D
> >
> > 2. On each of the ports I wanted to enable 128 queues.
> >
> > 3. Next I would want to segregate 8 queues per pool, leading to 16
> > pools per port.
> >
> > 4. 128 Queues are reqd. both for Tx and Rx directions.
> >
> > With the above requirement, I thought VMDq + DCB will be useful. So
> > when I receive traffic on a Port A say with Vlan 100, then I give it
> > Pool 1 in Port A. Then based on the QoS tag in the VLAN header, I would
> > go further and place it in an appropriate queue within the pool.
> >
> > I do not want to use RSS, but use DCB instead in combination with VMDq.
> >
> > Thanks
> > Rama
>
> I'm assuming you're doing this in Linux, right?
>
> The current Linux driver doesn't fully support VMDq in, but I know there is
> some work being done to enable it and present the VMDq pools as additional
> network ports - i.e. additional netdevs. For example, if the base network
> port is eth1, the VMDq ports would be named eth1v0, eth1v1 ... . I believe
> this is being done with the 2-queues-per-pool configuration. I'm not as
> familiar with the DCB setups myself, but you could probably modify the
> driver to use the 8 queues per pool with DCB as long as you've got all the
> DCB configuration set up on that machine and in your network. If you do
> this with all 4 of your hardware devices, you'll end up with 32 ethX
> interfaces, and a large number of MSIX interrupts needed.
>
> sln
>
>
>
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