> -----Original Message-----
> From: Gabe Black [mailto:[email protected]]
> Sent: Wednesday, January 23, 2013 12:54 PM
> To: Duyck, Alexander H
> Cc: [email protected]
> Subject: Re: [E1000-devel] packet header split configuration
> 
> > -----Original Message-----
> > From: Alexander Duyck [mailto:[email protected]]
> > When we had to pull support for Header splitting on 82599 we found
> > that we were actually able to implement an approach that performed
> > better than packet split did using single buffer mode.  As such we
> > have moved both the ixgbe and igb drivers over to that approach which
> > still does a form of header-data split, but without the hardware
> > support.  I cannot say for sure if or when we would drop the feature
> > as I am not that closely involved in hardware planning.
> 
> I suspected it wouldn't be very useful for off-the-shelf networking.  For our
> company we will be relying on it as we are developing a packet
> routing/replication application.  Having access to just the payload at nicely
> aligned memory boundaries is useful for payload inspection.  Furthermore, it
> would also allow us to easily create pairs of tx descriptors that link that
> payload to user-defined destinations (prebuilt headers) (i.e. to realize the
> routing/replication part).
> 
> Anyway, I hope the hardware team isn't dropping the feature... but I know
> you are not involved there :-)
> 
> Again, thank you for the information you have provided!  I'll see if I can 
> glean
> any information from hw planning.
> 
> Best wishes,
> Gabe
> 

The feature is in our Copper integrated PHY part x540 and we plan on having it 
in our follow up product as well.  However as Alex stated we aren't supporting 
it in the driver since we are see better performance with the software approach.

Thanks,
-Don Skidmore <[email protected]>



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