On 05/05/2013 8:38 AM, Wayne S wrote: > Joseph Wilhelmi <joe <at> amergint.com> writes: > >> >> Tushar, >> >> Thanks for the erratum. >> >> It seems like this might be the same problem as the 82574 since eeprom fix > for the825 74 says: >> "The value at offset 0x001e (58) has bit 1 unset. This enables the > problematic power saving feature. In this >> case, the EEPROM needs to read "5a" at offset 0x001e." >> >> The 82579 erratum states: >> "The Intel 82579 Gigabit Ethernet Controller may experience packet Loss at > 100 Mbps and 1 Gbps speeds when >> the link between the Intel 82579 Gigabit Ethernet Controller and the PCH > Integrated LAN Controller is >> exiting the Low Power Link (K1) State." >> >> I am betting that if there is a way to shut off power saving for the 82574 > in the eeprom that there would be a way >> to do a similar type of work around for the 82579. >> >> Thanks, >> Joe >> >> On Feb 5, 2013, at 5:30 PM, "Dave, Tushar N" <tushar.n.dave <at> > intel.com> wrote: >> >>> Thanks for the info. You data analysis seems accurate to me and looks > like packets are dropped silently. >>> To my wonder I have found that there is an erratum for 82579 packet loss > issue. It’s a chipset spec update >> however there is no existed workaround for this erratum as of > now.http://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/6-and-c200-chipset-specification-update.pdf >>> >>> -Tushar > > > I have also been looking at this problem with dq77kb with both 82574 and > 82579lm. The datasheet 82579-gbe-phy-datasheet-vol-2-1.pdf p 91 says the > pcie power management control PHY Address Register 17 mentions bit 14 - K1 > enable (Enable K1 Power Save Mode). The default is 0b but is this perhaps > getting enabled in the driver? Or is there a configuration change that can > disable Power Save mode? > > Wayne > > > > > > ------------------------------------------------------------------------------ > Get 100% visibility into Java/.NET code with AppDynamics Lite > It's a free troubleshooting tool designed for production > Get down to code-level detail for bottlenecks, with <2% overhead. > Download for free and get started troubleshooting in minutes. > http://p.sf.net/sfu/appdyn_d2d_ap2 > _______________________________________________ > E1000-devel mailing list > E1000-devel@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/e1000-devel > To learn more about Intel® Ethernet, visit > http://communities.intel.com/community/wired >
You can read and write this register in the driver with read: u16 data; ele_rphy(hw, HV_PM_CTRL, &data); write: ele_wphy(hw, HV_PM_CTRL, data); but I don't see any code that actually seems to set bit 14. Perhaps it is getting set somehow, and if so, it may be worth trying to add some code that reads the value in, clears bit 14, and writes it out, to see if it helps at all with the problem. ------------------------------------------------------------------------------ Learn Graph Databases - Download FREE O'Reilly Book "Graph Databases" is the definitive new guide to graph databases and their applications. This 200-page book is written by three acclaimed leaders in the field. The early access version is available now. Download your free book today! http://p.sf.net/sfu/neotech_d2d_may _______________________________________________ E1000-devel mailing list E1000-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/e1000-devel To learn more about Intel® Ethernet, visit http://communities.intel.com/community/wired
