Dear John and Don,
Thanks for kind reply.

This ARM SoC doesn’t have additional features for virtualization like VT-d.
And I'm not going to use SR-IOV for virtualization. I just want to do some
experimental VF test only with limited 2 or 4.

BTW, I have one more question about this.
Do you mean root-port can receive interrupt from VFs that are configured as
MSI mode?
If so, is it possible to differentiate between them? For example, by reading
flag registers again or something like that.



-----Original Message-----
From: Ronciak, John [mailto:[email protected]] 
Sent: Friday, June 14, 2013 12:13 AM
To: Skidmore, Donald C; mhban; Kirsher, Jeffrey T
Cc: [email protected]; Brandeburg, Jesse
Subject: RE: [E1000-devel] Regarding 82599 SR-IOV support in MSI

Hello,

No it's not possible.  MSI-X is needed so that interrupts can be routed to
each guest.  With MSI there is only a single interrupt so there is no way to
route it to multiple VF's.  MSI-X is a requirement for SR-IOV support.  So
don's comments below are correct.  Sorry.  

Does this system support VT-d or something like it for the address
translations?  Just curious.

Cheers,
John

Cheers,
John


> -----Original Message-----
> From: Skidmore, Donald C [mailto:[email protected]]
> Sent: Thursday, June 13, 2013 7:17 AM
> To: mhban; Kirsher, Jeffrey T
> Cc: [email protected]; Brandeburg, Jesse
> Subject: Re: [E1000-devel] Regarding 82599 SR-IOV support in MSI
> 
> Hey Minho,
> 
> I believe that it would be problematic at best since as MSI uses 
> identical address for all vectors in a Function and differentiates 
> vectors in a Function only by LSBs in data.
> 
> Thanks,
> -Don Skidmore <[email protected]>
> 
> > -----Original Message-----
> > From: mhban [mailto:[email protected]]
> > Sent: Thursday, June 13, 2013 12:40 AM
> > To: Kirsher, Jeffrey T
> > Cc: [email protected]; Brandeburg, Jesse
> > Subject: [E1000-devel] Regarding 82599 SR-IOV support in MSI
> >
> > Dear maintainer and all SR-IOV experts,
> >
> > I'm developing a board which is based on ARM SoC which support PCI 
> > Express root-port.
> > I'm trying to install and activate SR-IOV with Intel X520-SR2 on 
> > this board(/w Linux). Up to now, ixgbe and ixgbevf driver is loaded 
> > successfully but driver prints error when I try to do 'ifup'.
> >
> >      "PF still in reset state".
> >
> > While debugging it I found one important article from Intel 
> > community site,
> >
> >     http://communities.intel.com/message/158673#158673
> >
> > I realized Intel 82599 require MSI-X for SR-IOV not MSI, but the ARM 
> > SoC only support MSI.
> > What I want to know is if it is possible to activate SR-IOV with MSI 
> > (not MSI- X). I know ixgbevf officially doesn't support MSI for SR-
> IOV
> > but I just want to use it for experimental test on the ARM 
> > environment. According to the article, it seems there was no 
> > hardware limitation which  prevent the use of MSI. If so, can I make 
> > work SR-IOV using MSI instead of MSI-X by little re- work ixgbevf(or 
> > ixgbe
> also) driver?
> >
> > Please shed some light on this.
> >
> > Best regards,
> > Minho Ban
> >
> > SAMSUNG Electronics, Co., Ltd.
> > (Office) +82-31-301-8489  (Mobile) +82-10-8725-8864
> >
> >
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