As result of recent re-design of the MSI/MSI-X interrupts enabling pattern this driver has to be updated to use the new technique to obtain a optimal number of MSI/MSI-X interrupts required.
Signed-off-by: Alexander Gordeev <agord...@redhat.com> --- drivers/net/ethernet/mellanox/mlx5/core/main.c | 18 +++++++++--------- 1 files changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/main.c b/drivers/net/ethernet/mellanox/mlx5/core/main.c index adf0e5d..5c21e50 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/main.c @@ -119,8 +119,13 @@ static int mlx5_enable_msix(struct mlx5_core_dev *dev) int err; int i; + err = pci_msix_table_size(dev->pdev); + if (err < 0) + return err; + nvec = dev->caps.num_ports * num_online_cpus() + MLX5_EQ_VEC_COMP_BASE; nvec = min_t(int, nvec, num_eqs); + nvec = min_t(int, nvec, err); if (nvec <= MLX5_EQ_VEC_COMP_BASE) return -ENOSPC; @@ -131,20 +136,15 @@ static int mlx5_enable_msix(struct mlx5_core_dev *dev) for (i = 0; i < nvec; i++) table->msix_arr[i].entry = i; -retry: - table->num_comp_vectors = nvec - MLX5_EQ_VEC_COMP_BASE; err = pci_enable_msix(dev->pdev, table->msix_arr, nvec); - if (err <= 0) { + if (err) { + kfree(table->msix_arr); return err; - } else if (err > MLX5_EQ_VEC_COMP_BASE) { - nvec = err; - goto retry; } - mlx5_core_dbg(dev, "received %d MSI vectors out of %d requested\n", err, nvec); - kfree(table->msix_arr); + table->num_comp_vectors = nvec - MLX5_EQ_VEC_COMP_BASE; - return -ENOSPC; + return 0; } static void mlx5_disable_msix(struct mlx5_core_dev *dev) -- 1.7.7.6 ------------------------------------------------------------------------------ October Webinars: Code for Performance Free Intel webinars can help you accelerate application performance. Explore tips for MPI, OpenMP, advanced profiling, and more. Get the most from the latest Intel processors and coprocessors. See abstracts and register > http://pubads.g.doubleclick.net/gampad/clk?id=60134791&iu=/4140/ostg.clktrk _______________________________________________ E1000-devel mailing list E1000-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/e1000-devel To learn more about Intel® Ethernet, visit http://communities.intel.com/community/wired