I'm afraid that the issue you're seeing is with the PCIe in your ARM system. You're going to have to clear that up before you can get anything working on the PCIe bus such as an Ethernet controller. I would suggest contacting an ARM mailing list.
Todd Fujinaka Software Application Engineer Networking Division (ND) Intel Corporation todd.fujin...@intel.com (503) 712-4565 -----Original Message----- From: shiv prakash Agarwal [mailto:chhotu.s...@gmail.com] Sent: Saturday, April 26, 2014 11:04 AM To: Vick, Matthew Cc: e1000-devel@lists.sourceforge.net Subject: Re: [E1000-devel] ARM support for igb driver Hi Vick, Thanks for response. 1. I see this bit is also set while enumeration itself before igb driver is loaded. 2. Clearing this bit allows enumeration to be successful, setting it results in hang of any device config space writes. 3. Same root complex works for other cards like Intel NIC using e1000e driver. 4. Same issue seen with other I210 NIC cards. On Fri, Apr 25, 2014 at 9:17 PM, Vick, Matthew <matthew.v...@intel.com>wrote: > The device needs to set the Bus Master Enable bit so that it can > initiate DMA transactions. Without it set, it isn't really functional. > > If leaving that bit cleared lets you function, I would think it's > more of an issue with the root complex or associated bridges than the > device itself. It's possible it's an issue with the I210 you have, so > another option could be to try another I210. In either case, you > really should be contacting your hardware suppliers for support. > > Cheers, > Matthew > > From: shiv prakash Agarwal <chhotu.s...@gmail.com> > Date: Thursday, April 24, 2014 at 10:38 PM > To: Matthew Vick <matthew.v...@intel.com> > Cc: Carolyn Wyborny <carolyn.wybo...@intel.com>, "Rose, Gregory V" < > gregory.v.r...@intel.com>, "Kirsher, Jeffrey T" < > jeffrey.t.kirs...@intel.com>, "e1000-devel@lists.sourceforge.net" < > e1000-devel@lists.sourceforge.net> > Subject: Re: ARM support for igb driver > > Thanks Matthew, > > On furthur debug, I found that this hang happening on enabling Bus > Master Enable bit(bit 2) of command register (offset 0x4) in config space. > On disabling this bit, no hang occurs. > > Any idea on this behaviour? > > > > On Thu, Apr 24, 2014 at 11:51 PM, Vick, Matthew <matthew.v...@intel.com>wrote: > >> (Top-posting, I know, sorry! I'm adding e1000-devel, our support >> list for these kinds of inquiries.) >> >> It looks like you have a problem at the platform level with a PCI >> bridge, rather than a problem with our NIC. I think the right next >> step would be to contact your hardware vendor for your system. >> >> Cheers, >> Matthew >> >> From: shiv prakash Agarwal <chhotu.s...@gmail.com> >> Date: Thursday, April 24, 2014 at 6:38 AM >> To: Matthew Vick <matthew.v...@intel.com>, Carolyn Wyborny < >> carolyn.wybo...@intel.com>, "Rose, Gregory V" >> <gregory.v.r...@intel.com>, "Kirsher, Jeffrey T" >> <jeffrey.t.kirs...@intel.com> >> Subject: ARM support for igb driver >> >> Hi All, >> >> I am using below Intel I210 NIC card using igb driver on ARM >> >> >> http://www.intel.com/content/www/us/en/ethernet-controllers/ethernet- >> controller-i210-i211-family.html >> >> But during configuration stage, it hangs as soon as we do write >> access to device configuration space. >> >> Has anybody tested Intel I210 NIC card using igb driver on ARM? Any >> idea on above behaviour, log is below: >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> *PCI host bridge to bus 0000:00 pci_bus 0000:00: root bus resource >> [mem 0x32100000-0x3fffffff] pci_bus 0000:00: root bus resource [mem >> 0x12100000-0x320fffff pref] pci_bus 0000:00: root bus resource [io >> 0x1000-0xffff] pci_bus 0000:00: No busn resource found for root bus, >> will use [bus 00-ff] pci 0000:00:00.0: [10de:0e12] type 01 class >> 0x060400 pci >> 0000:00:00.0: PME# supported from D0 D1 D2 D3hot D3cold PCI: bus0: >> Fast back to back transfers disabled pci 0000:00:00.0: bridge >> configuration invalid ([bus 00-00]), reconfiguring pci 0000:01:00.0: >> [8086:1533] type 00 class 0x020000 pci 0000:01:00.0: reg 10: [mem >> 0x00000000-0x000fffff] Unhandled fault: imprecise external abort >> (0x1406) at 0x00000000 Internal >> error: : 1406 [#1] PREEMPT SMP ARM Modules linked in: CPU: 0 PID: 1 Comm: >> swapper/0 Not tainted 3.10.24 #2 task: ef06fa40 ti: ef0b2000 task.ti: >> ef0b2000* >> > > ------------------------------------------------------------------------------ "Accelerate Dev Cycles with Automated Cross-Browser Testing - For FREE Instantly run your Selenium tests across 300+ browser/OS combos. Get unparalleled scalability from the best Selenium testing platform available. Simple to use. Nothing to install. Get started now for free." http://p.sf.net/sfu/SauceLabs _______________________________________________ E1000-devel mailing list E1000-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/e1000-devel To learn more about Intel® Ethernet, visit http://communities.intel.com/community/wired
