Attached is the ethtool patch that allows setting the option.
Feedback welcome!
Regards,
Victor
On 04-07-16 10:18, li...@inliniac.net wrote:
> From: Victor Julien <vic...@inliniac.net>
>
> X(L)710 supports symmetric RSS hashing. See "7.1.9.3 Symmetric hash" in
> the "Intel® Ethernet Controller XL710 Datasheet".
>
> Support the ethtool rx-flow-hash 'x' option.
>
> Set:
> # ethtool -N $DEV rx-flow-hash tcp4 sdfnx
>
> Check:
> # ethtool -n $DEV rx-flow-hash tcp4
> TCP over IPV4 flows use these fields for computing Hash flow key:
> IP SA
> IP DA
> L4 bytes 0 & 1 [TCP/UDP src port]
> L4 bytes 2 & 3 [TCP/UDP dst port]
> Symmetric RSS hash
>
> TODO it seems we need to enable HSYM per port and per pctype. When
> disabling for a pctype we can't simply disable for a port as well
> as that affects other pctypes. Simply leaving it enabled is not
> good hygene, so perhaps we need some state keeping / deeper checking?
> Suggestions welcome.
> ---
> src/i40e_ethtool.c | 33 ++++++++++++++++++++++++++++++++-
> 1 file changed, 32 insertions(+), 1 deletion(-)
>
> diff --git a/src/i40e_ethtool.c b/src/i40e_ethtool.c
> index 1456ac5..10b5a62 100644
> --- a/src/i40e_ethtool.c
> +++ b/src/i40e_ethtool.c
> @@ -285,6 +285,11 @@ static const char
> i40e_priv_flags_strings[][ETH_GSTRING_LEN] = {
>
> #endif /* HAVE_ETHTOOL_GET_SSET_COUNT */
>
> +/* XXX this should not be necessary if we have an updated ethtool.h */
> +#ifndef RXH_RSS_SYM
> +#define RXH_RSS_SYM (1 << 8)
> +#endif
> +
> /**
> * i40e_partition_setting_complaint - generic complaint for MFP restriction
> * @pf: the PF struct
> @@ -2340,6 +2345,7 @@ static int i40e_get_rss_hash_opts(struct i40e_pf *pf,
> struct ethtool_rxnfc *cmd)
> struct i40e_hw *hw = &pf->hw;
> u8 flow_pctype = 0;
> u64 i_set = 0;
> + u32 rss_hash_set = 0;
>
> cmd->data = 0;
>
> @@ -2379,6 +2385,7 @@ static int i40e_get_rss_hash_opts(struct i40e_pf *pf,
> struct ethtool_rxnfc *cmd)
> flow_pctype)) |
> ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1,
> flow_pctype)) << 32);
> + rss_hash_set = (u32)i40e_read_rx_ctl(hw,
> I40E_GLQF_HSYM(flow_pctype));
> }
>
> /* Process bits of hash input set */
> @@ -2401,6 +2408,8 @@ static int i40e_get_rss_hash_opts(struct i40e_pf *pf,
> struct ethtool_rxnfc *cmd)
> if (i_set & BIT_ULL(I40E_L3_V6_DST_SHIFT))
> cmd->data |= RXH_IP_DST;
> }
> + if (rss_hash_set)
> + cmd->data |= RXH_RSS_SYM;
> }
>
> return 0;
> @@ -2716,6 +2725,7 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf,
> struct ethtool_rxnfc *nfc)
> ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
> u8 flow_pctype = 0;
> u64 i_set, i_setc;
> + uint32_t reg_val;
>
> if (pf->flags & I40E_FLAG_MFP_ENABLED) {
> dev_err(&pf->pdev->dev,
> @@ -2727,7 +2737,7 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf,
> struct ethtool_rxnfc *nfc)
> * to queues on src and dst IPs and ports
> */
> if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
> - RXH_L4_B_0_1 | RXH_L4_B_2_3))
> + RXH_L4_B_0_1 | RXH_L4_B_2_3 | RXH_RSS_SYM))
> return -EINVAL;
>
> switch (nfc->flow_type) {
> @@ -2805,6 +2815,27 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf,
> struct ethtool_rxnfc *nfc)
> i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype),
> (u32)(i_set >> 32));
> hena |= BIT_ULL(flow_pctype);
> +
> + if (nfc->data & RXH_RSS_SYM) {
> + /* enable HSYM on the port */
> + reg_val = i40e_read_rx_ctl(hw, I40E_PRTQF_CTL_0);
> + if ((reg_val & I40E_PRTQF_CTL_0_HSYM_ENA_MASK) == 0) {
> + reg_val |= I40E_PRTQF_CTL_0_HSYM_ENA_MASK;
> + i40e_write_rx_ctl(hw, I40E_PRTQF_CTL_0,
> reg_val);
> + }
> + /* enable HSYM on the pctype */
> + i40e_write_rx_ctl(hw, I40E_GLQF_HSYM(flow_pctype), 1UL);
> + } else {
> + /* disable HSYM on the port
> + XXX Disabling one (e.g. udp4) HSYM will disable for
> the entire port */
> + reg_val = i40e_read_rx_ctl(hw, I40E_PRTQF_CTL_0);
> + if (reg_val & I40E_PRTQF_CTL_0_HSYM_ENA_MASK) {
> + reg_val &= ~I40E_PRTQF_CTL_0_HSYM_ENA_MASK;
> + i40e_write_rx_ctl(hw, I40E_PRTQF_CTL_0,
> reg_val);
> + }
> + /* disable HSYM on the pctype */
> + i40e_write_rx_ctl(hw, I40E_GLQF_HSYM(flow_pctype), 0UL);
> + }
> }
>
> i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
>
--
---------------------------------------------
Victor Julien
http://www.inliniac.net/
PGP: http://www.inliniac.net/victorjulien.asc
---------------------------------------------
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