Hi all, I would like to add the management of a second strataflash memory chip on an ixdpg425 board in order to get an upgrade of 16MB. The added memory is the same than the first one (28F128J3D).
I read some documents and finally found one that really helped me but ... it seems to be not sufficient for me ! This document is this one: ftp://download.intel.com/design/network/applnots/25430802.pdf The chapter 5.4.1 is pretty explicit but i may have something else to do. Here are my changes 1) I changed the devfs/flash/arm/ixdpg425/current/include/ixdpg425_strataflash.inl file from #define CYGNUM_FLASH_DEVICES (1) to #define CYGNUM_FLASH_DEVICES (2) 2) I also modified the packages/hal/arm/ixdpg425/current/include/ixdpg425.h file from #define IXDP_FLASH_SIZE //0x01000000 // 16MB to #define IXDP_FLASH_SIZE //0x02000000 // 32MB May I have to change something on the following constant ? // CS0 (flash optimum timing) #define IXP425_EXP_CS0_INIT ... Or let it and create the IXP425_EXP_CS1_INIT one ? I also read this one: http://developer.intel.com/design/network/manuals/252480.htm The chapter 8 let me suppose that I have to duplicate the IXP425_EXP_CS0_INIT define to IXP425_EXP_CS1_INIT. Am I right ? After this changes, I loaded a redboot_RAM.srec into my board but it doesn't work. Thank for your help and sorry about my poor english ;-) Thierry Langlais -- Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss
