Hello Mark,
This is the base address of the CPU's window into PCI IO space. So if a
PCI device BAR is set to X in IO space, the CPU accesses it with BASE+X.
That's what I was thinking.
(and sorry I mean also HAL_PCI_PHYSICAL_MEMORY_BASE)
But I wonder why this value was different in Intel's port of RedBoot and
in the Linux kernel.
And why Linux kernel uses ioremap before accessing memory?
Maybe I should use something like that also in ecos?
This is described in the reference manual:
http://ecos.sourceware.org/docs-latest/ref/pci-library-reference.html
Thanks for the link.
I was searching deeper in the code and I found function
pci_config_setup, which is used for configuring PCI memory regions.
This function uses value XSCALE_PCI_TYPE_0_CONFIG_BASE.
Do you know how can I find correct HAL_PCI_PHYSICAL_MEMORY_BASE for the
ixdp2801?
Intel's port defines:
#define XSCALE_PCI_TYPE_0_CONFIG_BASE 0xDA000000
#define XSCALE_PCI_TYPE_1_CONFIG_BASE 0xDB000000
#define XSCALE_PCI_MEM_BASE 0xE0000000
#define XSCALE_PCI_MEM_SZ_MASK 0x1FFFFFFF
#define XSCALE_PCI_IO_BASE 0xD8000000
#define XSCALE_PCI_IO_SZ_MASK 0x1FFFFFF
#define HAL_PCI_PHYSICAL_MEMORY_BASE XSCALE_PCI_MEM_BASE
Linux kernel uses value 0xA0000000.
If this value is wrong, then maybe other PCI values are also wrong:
Intel has good online documentation for their hardware, but I can't find
anything about these values.
--
Jacek Poplawski
Software Engineer
Silicon and Software Systems
http://www.s3group.com
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