On 2007-01-02, Nick Garnett <[EMAIL PROTECTED]> wrote:
> Grant Edwards <[EMAIL PROTECTED]> writes:
>
>> There are no memory alignment or bus-error exceptions in the
>> NIOS2 processor and misaligned accesses are forbidden. The
>> CPU's reference manual states that misaligned accesses result
>> in "undefined operation". [...]
>
> The usual thing that happens is that the CPU ignores the least
> significant 1 or 2 bits of the address, so misaligned accesses are
> converted to aligned accesses silently.
I'm guessing that's what the NIOS2 does as well, but I haven't
verified it.
> This used to be the default for ARM,
Yea, I ran into that unintentionally a couple times. :/
> but it now has an option to raise an alignment exception.
>
>> The only hardware exceptions that can be caused by software
>> are:
>>
>> trap
>> break
>> valid but unimplemented instruction
>
> Sadly, it looks like you are out of luck. Disabling the
> hardware part of these tests seems the only thing to do.
I'll put that on the list of things to do. I'd skip the test
entirely, but I gather there is a software portion that is
still doing something useful?
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