On 2008-04-02, Andrew Lunn <[EMAIL PROTECTED]> wrote:
>> > void cyg_interrupt_set_vsr(cyg_vector_t vector, cyg_VSR_t* vsr);
>> >
>> > with the vector CYGNUM_HAL_VECTOR_FIQ.
>>
>> That would work. It would save a few clock cycles to set the
>> vector in the actual vector table rather than in the secondary
>> indirect one, but I don't know if it's worth the extra hassle.
>
> It is directly in the vector table, normally at address 0x20 for the
> beginning of the table and the FIQ entry at 0x3C. You cannot put an
> address at 0x1C, it has to be an instruction, and you have limited
> branch range so cannot make it generic.
Ah, right. I had forgotten about the address vs. instruction
piece of the puzzle. I was thinking you put an address at
0x1C.
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at gobble it!!
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