On Thu, Jul 3, 2008 at 4:58 PM, Alexandre <[EMAIL PROTECTED]> wrote: > TRACE: intr.cxx [ 86] Cyg_Interrupt::Cyg_Interrupt() > ((vector=7, > priority=4, data=40000860, isr=000049ec, dsr=00004a3c))
Let's try to advance by myself :) CYGNUM_HAL_INTERRUPT_UART1 is interrupt 7 so there must be an error around this. Can't both UARTs use the same priority level & if not, how can I change that ? -- Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss
