Paul D. DeRocco írta:
From: Szentirmai Gergely [mailto:[email protected]]
Paul D. DeRocco írta:
Does the existing MCI driver do the
entire sector transfer without using any interrupts?
No, but it polls for the result. This is what could be modified to the
code here, I have posted.
Here comes the thing which is not clear. Examine this code (perhaps an
eCos-recommended solution, is it?):
>> cyg_drv_dsr_lock();
>> {
>> while (!spi_bus->transfer_end)
>> cyg_drv_cond_wait(&spi_bus->transfer_cond);
>> }
>> cyg_drv_dsr_unlock();
spi_bus->transfer_cond is set by an interrupt. Until the operation is
not finished, dsr-s are locked.
I have found my answer, what is the difference between these
implementations:
http://osdir.com/ml/ecos.general/2003-03/msg00178.html
DSR locking works in a per-thread basis. So
cyg_drv_cond_wait(&spi_bus->transfer_cond); would trigger a task switch.
Thank you for your help!
Gergely Szentirmai
But in this chip the MCI interface can transfer a sector via the PDC,
so this shouldn't be necessary. You may have to start from
scratch and write
a better MCI driver that uses DMA and an interrupt at the end.
It do use it.
Since you earlier said that you poll for the result, I assume you mean here
that you use DMA but not an interrupt. If so, then all you have to do is
have a null ISR that just schedules a DSR, have the DSR signal a condition
variable, and use the same sort of code that the SPI driver uses. Then, your
MCI driver will work in a manner similar to the SPI driver, and they'll
happily interleave the initiation and completion of their respective
transfers.
The code polled for the completition only, the transfare is handled by
DMA and interrupts. So I needed that SPI driver code-part in the
function which had to block. The reason why I wrote this letter, because
I did not know how could it work, until I found that discussion I've
linked in. (the dsr locking per thread thing)
I have done the modification, it is working ok now!
Thanks for the help!
Gergely
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