Hi,
the arm-eabi-gcc from the eCos distribution sometimes
miscompiles HAL_DISABLE_INTERRUPTS macro for Cortex-M3:
Macro:
# define HAL_DISABLE_INTERRUPTS(__old) \
__asm__ volatile ( \
"mrs %0, basepri \n" \
"mov r1,%1 \n" \
"msr basepri,r1 \n" \
: "=r" (__old) \
: "r" (CYGNUM_HAL_CORTEXM_PRIORITY_MAX)\
: "r1" \
);
Code:
60133e26: f04f 0320 mov.w r3, #32
60133e2a: f3ef 8311 mrs r3, BASEPRI
60133e2e: 4619 mov r1, r3
60133e30: f381 8811 msr BASEPRI, r1
60133e34: 613b str r3, [r7, #16]
I.e. it uses r3 for both in- and output and sets
the BASEPRI to the original content, effectively leaving
the interrupts enabled.
This happened at Cyg_Interrupt::post_dsr and a few other
places. Yet another places use different register.
$ arm-eabi-gcc -v
Using built-in specs.
Target: arm-eabi
Configured with: /gnutools/src/toolchains/gcc/gcc-4.3.2/configure
-v --target=arm-eabi
--prefix=/gnutools/builds/toolchains/arm-eabi/tools
--with-newlib --with-gnu-as --with-gnu-ld
--enable-languages=c,c++ --disable-__cxa_atexit
--enable-threads --with-bugurl=http://bugs.ecos.sourceware.org/
--with-pkgversion='eCosCentric GNU tools 4.3.2-sw'
--with-cpu=arm7tdmi
Thread model: single
gcc version 4.3.2 (eCosCentric GNU tools 4.3.2-sw)
Where to report? - ecos bugzilla or gcc? I try to read
the exact semantics of the inline assembler and I am
not quite sure whether the macro is wrong or the compiler.
Regards
--
Stano
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