As i said in my last email, the AT91 system controller has a different
watchdog timer than the older devices. This patch contains a driver
for this new hardware.
A couple of points to note:
1) The watchdog timer is driven by the slow clock of the AT91. This is
an LC oscillator on the chip. The accuracy of this oscillator is
dependent on silicon process at manufacturing time and the
temperature. I found that my development board a watchdog timeout of
1000ms actually goes off at around 550ms at room temperature. So be
generous with your timeouts. This also means that one of the test case
fails because the timer goes off too early.
2) The mode register on the watchdog is read/write once. So once the
watchdog has been configured it cannot be changed without a reset. It
is possible if you are using Redboot it disables the watchdog and so
the application cannot then use it. Similarly a JTAG debugger could
disable it. I've put in an assertion check to detect this condition,
so if the watchdog does not appear to be working enable INFRA_DEBUG
and see if the assertion goes off.
Andrew
Index: devs/watchdog/arm/at91wdtc/current/ChangeLog
===================================================================
RCS file: devs/watchdog/arm/at91wdtc/current/ChangeLog
diff -N devs/watchdog/arm/at91wdtc/current/ChangeLog
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ devs/watchdog/arm/at91wdtc/current/ChangeLog 19 Feb 2006 19:17:00
-0000
@@ -0,0 +1,39 @@
+2006-02-18 Andrew Lunn <[EMAIL PROTECTED]>
+
+ * Added watchdog driver for ARM AT91 devices which have the
+ Watchdog Timer Controller as opposed to the older devices which
+ have the Watchdog Timer Interface.
+
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+// Copyright (C) 2003 Nick Garnett <[EMAIL PROTECTED]>
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
Index: devs/watchdog/arm/at91wdtc/current/cdl/watchdog_at91wdtc.cdl
===================================================================
RCS file: devs/watchdog/arm/at91wdtc/current/cdl/watchdog_at91wdtc.cdl
diff -N devs/watchdog/arm/at91wdtc/current/cdl/watchdog_at91wdtc.cdl
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ devs/watchdog/arm/at91wdtc/current/cdl/watchdog_at91wdtc.cdl 19 Feb
2006 19:17:01 -0000
@@ -0,0 +1,146 @@
+# ====================================================================
+#
+# watchdog_at91wdtc.cdl
+#
+# eCos watchdog for ARM AT91 WDTC driver configuration data
+#
+# ====================================================================
+#####ECOSGPLCOPYRIGHTBEGIN####
+## -------------------------------------------
+## This file is part of eCos, the Embedded Configurable Operating System.
+## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+## Copyright (C) 2003 Nick Garnett <[EMAIL PROTECTED]>
+## Copyright (C) 2006 Andrew Lunn ([EMAIL PROTECTED]>
+##
+## eCos is free software; you can redistribute it and/or modify it under
+## the terms of the GNU General Public License as published by the Free
+## Software Foundation; either version 2 or (at your option) any later version.
+##
+## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+## WARRANTY; without even the implied warranty of MERCHANTABILITY or
+## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+## for more details.
+##
+## You should have received a copy of the GNU General Public License along
+## with eCos; if not, write to the Free Software Foundation, Inc.,
+## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+##
+## As a special exception, if other files instantiate templates or use macros
+## or inline functions from this file, or you compile this file and link it
+## with other works to produce a work based on this file, this file does not
+## by itself cause the resulting work to be covered by the GNU General Public
+## License. However the source code for this file must still be made available
+## in accordance with section (3) of the GNU General Public License.
+##
+## This exception does not invalidate any other reasons why a work based on
+## this file might be covered by the GNU General Public License.
+## -------------------------------------------
+#####ECOSGPLCOPYRIGHTEND####
+# ====================================================================
+######DESCRIPTIONBEGIN####
+#
+# Author(s): tkoeller
+# Contributors: tkoeller, nickg, asl
+# Date: 2006-02-18
+#
+#####DESCRIPTIONEND####
+#
+# ====================================================================
+
+cdl_package CYGPKG_DEVICES_WATCHDOG_ARM_AT91WDTC {
+ parent CYGPKG_IO_WATCHDOG
+ active_if CYGPKG_IO_WATCHDOG
+ display "ARM AT91 WDTC watchdog driver"
+ requires CYGPKG_HAL_ARM_AT91
+ requires CYGPKG_KERNEL
+ hardware
+ define_header devs_watchdog_arm_at91wdtc.h
+ compile watchdog_at91wdtc.cxx
+ implements CYGINT_WATCHDOG_HW_IMPLEMENTATIONS
+ active_if CYGIMP_WATCHDOG_HARDWARE
+ description "
+ This package uses the watchdog device integrated
+ in the AT91 to execute a predefined action if the
+ application fails to call the reset function for
+ longer than a given timeout interval. This package
+ currently only supports the AT91SAM7S device which
+ use the Watchdog Timer Controller."
+
+ cdl_option CYGIMP_WATCHDOG_HARDWARE {
+ parent CYGPKG_IO_WATCHDOG_IMPLEMENTATION
+ display "Hardware watchdog"
+ calculated 1
+ implements CYGINT_WATCHDOG_IMPLEMENTATIONS
+ }
+
+ cdl_option CYGNUM_DEVS_WATCHDOG_ARM_AT91WDTC_DESIRED_TIMEOUT_MS {
+ display "Desired timeout value"
+ flavor data
+ default_value 1000
+ description "
+ This parameter controls the watchdog timeout interval.
+ Note that you may not get the exact value requested
+ here, the timeout interval may have to be adjusted
+ because of hardware limitations. The actual timeout
+ used will be the smallest possible value that is not
+ less than this parameter. Since the timeout is derived
+ from the LC based slow clock don't expect great accuracy.
+ On my board a 1000ms timeout actually goes off after 550ms!"
+ }
+
+ cdl_option CYGNUM_DEVS_WATCHDOG_ARM_AT91WDTC_TIMEOUT_VALUE {
+ display "Calculated timeout value"
+ flavor data
+ calculated { (CYGNUM_HAL_ARM_AT91_SLOW_CLOCK / 128) *
+
(CYGNUM_DEVS_WATCHDOG_ARM_AT91WDTC_DESIRED_TIMEOUT_MS / 1000)
+ }
+ legal_values { 0 to 4096 }
+ description "
+ This is the calculated value that will be placed into
+ watchdog counter timer."
+ }
+
+ cdl_option CYGSEM_DEVS_WATCHDOG_ARM_AT91WDTC_RESET {
+ display "Generate reset on watchdog expiration"
+ flavor bool
+ default_value 1
+ implements CYGINT_WATCHDOG_RESETS_ON_TIMEOUT
+ description "
+ Enabling this option changes the watchdog operation mode
+ to generate a system reset upon expiration instead of
+ invoking an application-defined action."
+ }
+
+ cdl_component CYGPKG_DEVICES_WATCHDOG_ARM_AT91WDTC_OPTIONS {
+ display "AT91 watchdog build options"
+ flavor none
+ description "
+ Package specific build options including control over
+ compiler flags used only in building this package,
+ and details of which tests are built."
+
+ cdl_option CYGPKG_DEVICES_WATCHDOG_ARM_AT91WDTC_CFLAGS_ADD {
+ display "Additional compiler flags"
+ flavor data
+ no_define
+ default_value { "" }
+ description "
+ This option modifies the set of compiler flags for
+ building the watchdog device. These flags are used in addition
+ to the set of global flags."
+ }
+
+ cdl_option CYGPKG_DEVICES_WATCHDOG_ARM_AT91WDTC_CFLAGS_REMOVE {
+ display "Suppressed compiler flags"
+ flavor data
+ no_define
+ default_value { "" }
+ description "
+ This option modifies the set of compiler flags for
+ building the watchdog device. These flags are removed from
+ the set of global flags if present."
+ }
+ }
+}
+
+# EOF watchdog_at91WDTC.cdl
Index: devs/watchdog/arm/at91wdtc/current/src/watchdog_at91wdtc.cxx
===================================================================
RCS file: devs/watchdog/arm/at91wdtc/current/src/watchdog_at91wdtc.cxx
diff -N devs/watchdog/arm/at91wdtc/current/src/watchdog_at91wdtc.cxx
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ devs/watchdog/arm/at91wdtc/current/src/watchdog_at91wdtc.cxx 19 Feb
2006 19:17:01 -0000
@@ -0,0 +1,198 @@
+//==========================================================================
+//
+// devs/watchdog/arm/at91/watchdog_at91wdtc.cxx
+//
+// Watchdog implementation for ARM AT91 CPUs using the WDTC
+//
+//==========================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+// Copyright (C) 2003 Nick Garnett <[EMAIL PROTECTED]>
+// copyright (C) 2006 Andrew Lunn <[EMAIL PROTECTED]>
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//==========================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s): tkoeller
+// Contributors: tkoeller, nickg, asl
+// Date: 2006-02-18
+// Purpose: Watchdog class implementation
+// Description: Contains an implementation of the Watchdog class for use
+// with the ATMEL AT91 watchdog timer controller.
+//
+//####DESCRIPTIONEND####
+//
+//==========================================================================
+
+#include <pkgconf/kernel.h>
+#include <pkgconf/infra.h>
+#include <pkgconf/kernel.h>
+#include <pkgconf/watchdog.h>
+#include <pkgconf/devs_watchdog_arm_at91wdtc.h>
+
+#include <cyg/infra/cyg_type.h>
+#include <cyg/infra/cyg_ass.h>
+#include <cyg/infra/cyg_trac.h>
+#include <cyg/hal/hal_io.h>
+#include <cyg/hal/hal_diag.h>
+
+#include <cyg/io/watchdog.hxx>
+
+#include <cyg/infra/diag.h>
+
+#if !defined(CYGSEM_WATCHDOG_RESETS_ON_TIMEOUT)
+#include <cyg/hal/hal_platform_ints.h>
+#include <cyg/kernel/intr.hxx>
+#endif
+
+//==========================================================================
+
+#if defined(CYGSEM_WATCHDOG_RESETS_ON_TIMEOUT)
+
+#define MRVAL (AT91_WDTC_WDMR_RSTEN | AT91_WDTC_WDMR_DBGHLT)
+
+void
+Cyg_Watchdog::init_hw(void)
+{
+ CYG_REPORT_FUNCTION();
+ CYG_REPORT_FUNCARGVOID();
+ resolution = CYGNUM_DEVS_WATCHDOG_ARM_AT91WDTC_DESIRED_TIMEOUT_MS * 1000000;
+ CYG_REPORT_RETURN();
+}
+
+#else /* defined(CYGSEM_WATCHDOG_RESETS_ON_TIMEOUT) */
+
+//==========================================================================
+
+#define MRVAL (AT91_WDTC_WDMR_FIEN | AT91_WDTC_WDMR_DBGHLT)
+#define INT_PRIO 7
+
+//==========================================================================
+
+static Cyg_Watchdog *wd;
+
+//==========================================================================
+
+static cyg_uint32
+isr(cyg_vector vector, CYG_ADDRWORD data)
+{
+ cyg_uint32 sr;
+ CYG_REPORT_FUNCTION();
+ CYG_REPORT_FUNCARG2XV(vector, data);
+
+ // Read the status register to clear the interrupt
+ HAL_READ_UINT32(AT91_WDTC + AT91_WDTC_WDSR, sr);
+
+ wd->trigger();
+ Cyg_Interrupt::acknowledge_interrupt(CYGNUM_HAL_INTERRUPT_WDTC);
+ CYG_REPORT_RETVAL(Cyg_Interrupt::HANDLED);
+ return Cyg_Interrupt::HANDLED;
+}
+
+//==========================================================================
+
+static CYGBLD_ATTRIB_INIT_PRI(CYG_INIT_DRIVERS)
+ Cyg_Interrupt wdint(
+ CYGNUM_HAL_INTERRUPT_WDTC,
+ INT_PRIO,
+ 0,
+ isr,
+ NULL
+ );
+
+//==========================================================================
+
+void
+Cyg_Watchdog::init_hw(void)
+{
+ CYG_REPORT_FUNCTION();
+ CYG_REPORT_FUNCARGVOID();
+
+ wd = this;
+
+ wdint.attach();
+ wdint.acknowledge_interrupt(CYGNUM_HAL_INTERRUPT_WDTC);
+ wdint.unmask_interrupt(CYGNUM_HAL_INTERRUPT_WDTC);
+ resolution = CYGNUM_DEVS_WATCHDOG_ARM_AT91WDTC_DESIRED_TIMEOUT_MS * 1000000;
+ CYG_REPORT_RETURN();
+}
+
+#endif /* defined(CYGSEM_WATCHDOG_RESETS_ON_TIMEOUT) */
+
+//==========================================================================
+/*
+ * Reset watchdog timer. This needs to be called regularly to prevent
+ * the watchdog from firing.
+ */
+
+void
+Cyg_Watchdog::reset(void)
+{
+ CYG_REPORT_FUNCTION();
+ CYG_REPORT_FUNCARGVOID();
+
+ /* Write magic code to reset the watchdog. */
+ HAL_WRITE_UINT32(AT91_WDTC + AT91_WDTC_WDCR,
+ AT91_WDTC_WDCR_RELOAD | AT91_WDTC_WDCR_KEY);
+
+ CYG_REPORT_RETURN();
+}
+
+//==========================================================================
+/*
+ * Start watchdog to generate a hardware reset
+ * or interrupt when expiring.
+ */
+
+void
+Cyg_Watchdog::start(void)
+{
+ cyg_uint32 val, val1;
+
+ CYG_REPORT_FUNCTION();
+ CYG_REPORT_FUNCARGVOID();
+
+ val = (MRVAL | CYGNUM_DEVS_WATCHDOG_ARM_AT91WDTC_TIMEOUT_VALUE |
+ (CYGNUM_DEVS_WATCHDOG_ARM_AT91WDTC_TIMEOUT_VALUE <<
+ AT91_WDTC_WDMR_WDD_SHIFT));
+
+ HAL_WRITE_UINT32(AT91_WDTC + AT91_WDTC_WDMR, val);
+ HAL_READ_UINT32(AT91_WDTC + AT91_WDTC_WDMR, val1);
+
+ // If this assert goes if it probably means something else has
+ // already programmed the watchdog. The mode register is only
+ // writeable once and once it is set it can only be reset by a
+ // processor reset.
+ CYG_ASSERT(val == val1, "Unable to configure watchdog");
+
+ CYG_REPORT_RETURN();
+}
+
+//==========================================================================
+// End of watchdog_at91.cxx
