? packages/.cdtproject
? packages/.project
? packages/devs/usb/at91
? packages/devs/usb/at91 001
? packages/devs/usb/usb_drv.01.diff

Index: packages/devs/serial/arm/at91/current/src/at91_serial.c
===================================================================
RCS file: /cvs/ecos/ecos/packages/devs/serial/arm/at91/current/src/at91_serial.c,v
retrieving revision 1.11
diff -u -r1.11 at91_serial.c
--- packages/devs/serial/arm/at91/current/src/at91_serial.c	19 Feb 2006 19:52:56 -0000	1.11
+++ packages/devs/serial/arm/at91/current/src/at91_serial.c	3 Mar 2006 14:11:56 -0000
@@ -325,6 +325,10 @@
       AT91_US_CR_RxENAB | AT91_US_CR_TxENAB | AT91_US_CR_RSTATUS | AT91_US_CR_STTTO
     );
 
+#ifdef AT91_US_PTCR
+    HAL_WRITE_UINT32(base + AT91_US_PTCR, AT91_US_PTCR_RXTEN | AT91_US_PTCR_TXTEN);
+#endif
+
     if (new_config != &chan->config) {
         chan->config = *new_config;
     }
@@ -517,6 +521,7 @@
     at91_serial_info * const at91_chan = (at91_serial_info *) chan->dev_priv;
     const CYG_ADDRWORD base = at91_chan->base;
     CYG_WORD32 stat, mask;
+    cyg_uint32 retcode = 0;
 
     HAL_READ_UINT32(base + AT91_US_CSR, stat);
     HAL_READ_UINT32(base + AT91_US_IMR, mask);
@@ -533,14 +538,17 @@
             (CYG_ADDRESS) at91_chan->rcv_buffer[at91_chan->curbuf]
                 + at91_chan->rcv_chunk_size + RCVBUF_EXTRA - x
         );
+        retcode = CYG_ISR_CALL_DSR;
     }
 
-    if (stat & (AT91_US_IER_TxRDY | AT91_US_IER_ENDTX))
-      HAL_WRITE_UINT32(base + AT91_US_IDR, AT91_US_IER_TxRDY | AT91_US_IER_ENDTX);
+    if (stat & (AT91_US_IER_TxRDY | AT91_US_IER_ENDTX)){
+        HAL_WRITE_UINT32(base + AT91_US_IDR, AT91_US_IER_TxRDY | AT91_US_IER_ENDTX);
+        retcode = CYG_ISR_CALL_DSR;
+    }
 
     at91_chan->stat |= stat;
     cyg_drv_interrupt_acknowledge(vector);
-    return CYG_ISR_CALL_DSR;
+    return retcode;
 }
 
 // Serial I/O - high level interrupt handler (DSR)
Index: packages/hal/arm/at91/at91sam7s/current/cdl/hal_arm_at91sam7s.cdl
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/at91/at91sam7s/current/cdl/hal_arm_at91sam7s.cdl,v
retrieving revision 1.1
diff -u -r1.1 hal_arm_at91sam7s.cdl
--- packages/hal/arm/at91/at91sam7s/current/cdl/hal_arm_at91sam7s.cdl	19 Feb 2006 20:32:24 -0000	1.1
+++ packages/hal/arm/at91/at91sam7s/current/cdl/hal_arm_at91sam7s.cdl	3 Mar 2006 13:34:33 -0000
@@ -62,7 +62,7 @@
     requires      { CYGHWR_HAL_ARM_AT91_FIQ     }
     requires      { CYGHWR_HAL_ARM_AT91SAM7S == "at91sam7s32" implies
                     CYGPKG_IO_SERIAL_ARM_AT91_SERIAL0 == 0 }
-    requires      { CYGPKG_IO_SERIAL_ARM_AT91_SERIAL2 == 0 }
 
     implements    CYGINT_HAL_ARM_AT91_SERIAL_DBG_HW
     implements    CYGINT_HAL_ARM_AT91_PIT_HW
@@ -189,7 +189,7 @@
     cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS {
         display       "Number of communication channels on the board"
         flavor        data
-        default_value 1
+        default_value 3
         description   "
             The AT91SAM7S development boards have only one USART serial
             port connector even though there are two real serial ports. 
@@ -202,7 +202,7 @@
         active_if        CYGPRI_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_CONFIGURABLE
         flavor data
         legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
-        default_value    0
+        default_value    2
         description      "
             The AT91SAM7S has two USART serial ports. This option
             chooses which port will be used to connect to a host
@@ -214,7 +214,7 @@
          active_if        CYGPRI_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_CONFIGURABLE
          flavor data
          legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
-         default_value    0
+         default_value    2
          description      "
             The AT91SAM7S board has two USART serial ports. This option
             chooses which port will be used for diagnostic output."
Index: packages/hal/arm/at91/at91sam7s/current/include/hal_platform_ints.h
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/at91/at91sam7s/current/include/hal_platform_ints.h,v
retrieving revision 1.1
diff -u -r1.1 hal_platform_ints.h
--- packages/hal/arm/at91/at91sam7s/current/include/hal_platform_ints.h	19 Feb 2006 20:32:24 -0000	1.1
+++ packages/hal/arm/at91/at91sam7s/current/include/hal_platform_ints.h	3 Mar 2006 13:34:33 -0000
@@ -84,6 +84,8 @@
 #define CYGNUM_HAL_INTERRUPT_RSTC               37
 #define CYGNUM_HAL_INTERRUPT_DBG                38
 
+#define CYGNUM_HAL_INTERRUPT_USART2 CYGNUM_HAL_INTERRUPT_DBG /* Definition for the AT91 Serial-Driver */
+
 #define CYGNUM_HAL_ISR_MIN			 0
 #define CYGNUM_HAL_ISR_MAX			38
 
Index: packages/hal/arm/at91/at91sam7s/current/include/hal_platform_setup.h
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/at91/at91sam7s/current/include/hal_platform_setup.h,v
retrieving revision 1.1
diff -u -r1.1 hal_platform_setup.h
--- packages/hal/arm/at91/at91sam7s/current/include/hal_platform_setup.h	19 Feb 2006 20:32:24 -0000	1.1
+++ packages/hal/arm/at91/at91sam7s/current/include/hal_platform_setup.h	3 Mar 2006 13:34:33 -0000
@@ -90,7 +106,7 @@
 
         // Set the PLL multiplier and divider. 16 slow clocks go by
 	// before the LOCK bit is set. */
-        ldr     r1,=((AT91_PMC_PLLR_DIV(CYGNUM_HAL_ARM_AT91_PLL_DIVIDER))|(AT91_PMC_PLLR_PLLCOUNT(16))|(AT91_PMC_PLLR_MUL(CYGNUM_HAL_ARM_AT91_PLL_MULTIPLIER+1)))
+        ldr     r1,=(AT91_PMC_PLLR_USBDIV_1|(AT91_PMC_PLLR_DIV(CYGNUM_HAL_ARM_AT91_PLL_DIVIDER))|(AT91_PMC_PLLR_PLLCOUNT(16))|(AT91_PMC_PLLR_MUL(CYGNUM_HAL_ARM_AT91_PLL_MULTIPLIER-1)))
         str     r1,[r0,#AT91_PMC_PLLR]
 
         // Wait for PLL locked indication
Index: packages/hal/arm/at91/at91sam7s/current/include/plf_io.h
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/at91/at91sam7s/current/include/plf_io.h,v
retrieving revision 1.1
diff -u -r1.1 plf_io.h
--- packages/hal/arm/at91/at91sam7s/current/include/plf_io.h	19 Feb 2006 20:32:24 -0000	1.1
+++ packages/hal/arm/at91/at91sam7s/current/include/plf_io.h	3 Mar 2006 13:34:33 -0000
@@ -62,6 +62,7 @@
 
 #define AT91_USART0 0xFFFC0000
 #define AT91_USART1 0xFFFC4000
+#define AT91_USART2 0xFFFFF200 //DEBUG_USART
 
 #ifndef __ASSEMBLER__
 #ifdef CYGBLD_HAL_ARM_AT91_BAUD_DYNAMIC
@@ -79,6 +80,10 @@
 #define AT91_US_NTPR 0x118 // Next Transmit Pointer Register 
 #define AT91_US_NTCR 0x11C // Next Trsnsmit Counter Register
 #define AT91_US_PTCR 0x120 // PDC Transfer Control Register
+#define AT91_US_PTCR_RXTEN  (1 << 0)
+#define AT91_US_PTCR_RXTDIS (2 << 0)
+#define AT91_US_PTCR_TXTEN  (1 << 8)
+#define AT91_US_PTCR_TXTDIS (2 << 8)
 #define AT91_US_PTSR 0x124 // PDC Transfer Status Register
 
 // PIO - Programmable I/O
@@ -124,6 +129,9 @@
 #define AT91_PMC_MCKR_PRES_CLK_16 (4 << 2) // divide by 16
 #define AT91_PMC_MCKR_PRES_CLK_32 (5 << 2) // divide by 32
 #define AT91_PMC_MCKR_PRES_CLK_64 (6 << 2) // divide by 64
+#define AT91_PMC_PCK0 0x40 // 
+#define AT91_PMC_PCK1 0x44 // 
+#define AT91_PMC_PCK2 0x48 // 
 #define AT91_PMC_IER  0x60 // Interrupt Enable Register
 #define AT91_PMC_IDR  0x64 // Interrupt Disable Register
 #define AT91_PMC_SR   0x68 // Status Register
Index: packages/hal/arm/at91/at91sam7s/current/src/at91sam7s_misc.c
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/at91/at91sam7s/current/src/at91sam7s_misc.c,v
retrieving revision 1.1
diff -u -r1.1 at91sam7s_misc.c
--- packages/hal/arm/at91/at91sam7s/current/src/at91sam7s_misc.c	19 Feb 2006 20:32:25 -0000	1.1
+++ packages/hal/arm/at91/at91sam7s/current/src/at91sam7s_misc.c	3 Mar 2006 13:34:33 -0000
@@ -94,11 +94,11 @@
 {
   /* Enable the Serial devices to driver the serial port pins */
   HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_PDR, 
-                   AT91_PIO_PSR_RXD0 | AT91_PIO_PSR_TXD0);
+                   AT91_PIO_PSR_RXD0 | AT91_PIO_PSR_TXD0 | AT91_PIO_PSR_DTXD);
 
   /* Set the serial port pins to PIOA */
   HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_ASR,
-                   AT91_PIO_PSR_RXD0 | AT91_PIO_PSR_TXD0);
+                   AT91_PIO_PSR_RXD0 | AT91_PIO_PSR_TXD0 | AT91_PIO_PSR_DRXD | AT91_PIO_PSR_DTXD);
 
 #if !defined(CYGHWR_HAL_ARM_AT91SAM7S_at91sam7s32)
   /* Enable the Serial devices to driver the serial port pins */
@@ -117,11 +117,11 @@
                    AT91_RST_RMR_KEY);
 
 #ifdef CYGBLD_HAL_ARM_AT91_SERIAL_UART
-  /* Enable peripheral clocks for USART 0 and 1 if they are to be used */
+  /* Enable peripheral clocks for USART 0, 1 and 2 if they are to be used */
   HAL_WRITE_UINT32(AT91_PMC+AT91_PMC_PCER, 
                    AT91_PMC_PCER_US0 |
                    AT91_PMC_PCER_US1 |
-                   CYGNUM_HAL_INTERRUPT_SYS);
+                   AT91_PMC_PCER_SYS);
 #endif
 
 #ifdef CYGBLD_HAL_ARM_AT91_TIMER_TC
Index: packages/hal/arm/at91/var/current/include/var_io.h
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/at91/var/current/include/var_io.h,v
retrieving revision 1.14
diff -u -r1.14 var_io.h
--- packages/hal/arm/at91/var/current/include/var_io.h	25 Feb 2006 20:12:32 -0000	1.14
+++ packages/hal/arm/at91/var/current/include/var_io.h	3 Mar 2006 13:34:35 -0000
@@ -799,6 +799,7 @@
 #define AT91_PMC_SCER_PCK2 (1 << 10) // Programmable Clock Output
 #define AT91_PMC_SCER_PCK3 (1 << 11) // Programmable Clock Output
 
+#define AT91_PMC_PCER_SYS  (1 << 1) // SYSTEM + DEBUG
 #define AT91_PMC_PCER_PIOA (1 << 2) // Parallel IO Controller
 #define AT91_PMC_PCER_ADC  (1 << 4) // Analog-to-Digital Conveter
 #define AT91_PMC_PCER_SPI  (1 << 5) // Serial Peripheral Interface
Index: packages/hal/arm/at91/var/current/src/hal_diag.c
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/at91/var/current/src/hal_diag.c,v
retrieving revision 1.5
diff -u -r1.5 hal_diag.c
--- packages/hal/arm/at91/var/current/src/hal_diag.c	12 Nov 2004 09:08:47 -0000	1.5
+++ packages/hal/arm/at91/var/current/src/hal_diag.c	3 Mar 2006 13:34:35 -0000
@@ -269,12 +269,16 @@
     return res;
 }
 
-static channel_data_t at91_ser_channels[3] = {
+static channel_data_t at91_ser_channels[CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS] = {
+#if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 0
     { (cyg_uint8*)AT91_USART0, 1000, CYGNUM_HAL_INTERRUPT_USART0, CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD},
+#if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 1
     { (cyg_uint8*)AT91_USART1, 1000, CYGNUM_HAL_INTERRUPT_USART1, CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD},
-#ifdef AT91_USART2
+#if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 2
     { (cyg_uint8*)AT91_USART2, 1000, CYGNUM_HAL_INTERRUPT_USART2, CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD}
 #endif
+#endif
+#endif
 };
 
 static void
@@ -286,16 +290,19 @@
     cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
 
     // Init channels
+#if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 0
     cyg_hal_plf_serial_init_channel(&at91_ser_channels[0]);
 #if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 1
     cyg_hal_plf_serial_init_channel(&at91_ser_channels[1]);
-#endif
 #if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 2
     cyg_hal_plf_serial_init_channel(&at91_ser_channels[2]);
 #endif
+#endif
+#endif
     // Setup procs in the vector table
 
     // Set channel 0
+#if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 0
     CYGACC_CALL_IF_SET_CONSOLE_COMM(0);
     comm = CYGACC_CALL_IF_CONSOLE_PROCS();
     CYGACC_COMM_IF_CH_DATA_SET(*comm, &at91_ser_channels[0]);
@@ -319,7 +326,7 @@
     CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
     CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
     CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
-#endif
+
 #if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 2    
     CYGACC_CALL_IF_SET_CONSOLE_COMM(2);
     comm = CYGACC_CALL_IF_CONSOLE_PROCS();
@@ -332,6 +339,8 @@
     CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
     CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
 #endif
+#endif
+#endif
 
     // Restore original console
     CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);