Nick Garnett <[EMAIL PROTECTED]> writes: > Sergei Organov <[EMAIL PROTECTED]> writes: > >> Attached is modified patch that implements FIFO scheduling of DSRs and >> makes it the default. >> >> Compared to the original patch, less files are modified, more assertions >> are added, and FIFO variant of the call_pending_DSRs_inner() is >> optimized both for single DSR and for multiple DSRs in the list. >> >> In addition, two related minor fixes to the comments in the kernel tests >> are provided. >> >> Tested on ARM. > > This has now been checked in, the actual patch committed is attached.
Thanks, Nick! There is one minor typo in doc string though: [...] > Index: kernel/current/cdl/interrupts.cdl > =================================================================== > RCS file: /cvs/ecos/ecos/packages/kernel/current/cdl/interrupts.cdl,v > retrieving revision 1.4 > diff -u -5 -r1.4 interrupts.cdl > --- kernel/current/cdl/interrupts.cdl 23 May 2002 23:06:45 -0000 1.4 > +++ kernel/current/cdl/interrupts.cdl 11 Aug 2006 09:20:29 -0000 > @@ -72,21 +72,37 @@ > } [...] > + description "When this option is set, DSRs are scheduled > + in the natural FIFO (first in, first out) order, > + otherwise they are scheduled in LIFO (last in, first > + out) order. Applications should not rely on any > + particular order of scheduling of DSRs. LIFO > + scheduling is kept for backward compatibility only and > + is not recommended as it may lead to high (up to 2 > + times higher then FIFO) IRQ-to-DSR latencies at some It should be "than FIFO", not "then FIFO". -- Sergei.
