Index: packages/hal/arm/at91/at91sam7s/current/ChangeLog
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/at91/at91sam7s/current/ChangeLog,v
retrieving revision 1.7
diff -u -r1.7 ChangeLog
--- packages/hal/arm/at91/at91sam7s/current/ChangeLog	2 Jun 2006 18:15:29 -0000	1.7
+++ packages/hal/arm/at91/at91sam7s/current/ChangeLog	7 Sep 2006 06:10:46 -0000
@@ -1,3 +1,8 @@
+2006-06-01  John Eigelaar <jeigelaar@mweb.co.za>
+
+	* include/plf_io.h: Added definition for SPI Mode Failure Disable bit
+	in the SPI Mode register.
+
 2006-06-01  Andrew Lunn  <andrew.lunn@ascom.ch>
 
 	* cdl/hal_arm_at91sam7s.cdl: Implement the SPI bus 1 interface for
Index: packages/hal/arm/at91/at91sam7s/current/include/plf_io.h
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/at91/at91sam7s/current/include/plf_io.h,v
retrieving revision 1.4
diff -u -r1.4 plf_io.h
--- packages/hal/arm/at91/at91sam7s/current/include/plf_io.h	2 Jun 2006 18:15:29 -0000	1.4
+++ packages/hal/arm/at91/at91sam7s/current/include/plf_io.h	7 Sep 2006 06:08:21 -0000
@@ -62,6 +62,9 @@
 
 #define AT91_SPI AT91_SPI0
 
+//Extra SPI control bits
+#define AT91_SPI_MR_MODFDIS (1<<4)
+
 // DMA registers 
 #define AT91_SPI_RPR  0x100 // Receive Pointer Register
 #define AT91_SPI_RCR  0x104 // Receive Counter Register