diff -ruN -x 'Entries*' ecos_web_cvs/ecos/packages/hal/arm/at91/sam7ex256/current/ChangeLog ecos/ecos/packages/hal/arm/at91/sam7ex256/current/ChangeLog
--- ecos_web_cvs/ecos/packages/hal/arm/at91/sam7ex256/current/ChangeLog	2007-01-08 20:07:42.000000000 +0100
+++ ecos/ecos/packages/hal/arm/at91/sam7ex256/current/ChangeLog	2007-04-06 18:22:10.000000000 +0200
@@ -1,3 +1,8 @@
+2007-04-06  Uwe Kindler  <uwe_kindler@web.de>
+
+	* src/sam7ex256_misc.c Added hal_plf_eth_init() in order to initialise 
+	  the Micrel KS8721 PHY properly on the Olimex board
+
 2007-08-01  Uwe Kindler  <uwe_kindler@web.de>
 
 	* src/sam7ex256_misc.c Use the backlight of the lcd as a simple 1-bit LED
diff -ruN -x 'Entries*' ecos_web_cvs/ecos/packages/hal/arm/at91/sam7ex256/current/cdl/hal_arm_sam7ex256.cdl ecos/ecos/packages/hal/arm/at91/sam7ex256/current/cdl/hal_arm_sam7ex256.cdl
--- ecos_web_cvs/ecos/packages/hal/arm/at91/sam7ex256/current/cdl/hal_arm_sam7ex256.cdl	2007-01-07 16:22:05.000000000 +0100
+++ ecos/ecos/packages/hal/arm/at91/sam7ex256/current/cdl/hal_arm_sam7ex256.cdl	2007-04-04 21:08:49.000000000 +0200
@@ -58,6 +58,10 @@
     requires      { CYGHWR_HAL_ARM_AT91 == "AT91SAM7S" }
     requires      { CYGHWR_HAL_ARM_AT91SAM7 == "at91sam7x256" }
     
+    requires      { is_active(CYGPKG_DEVS_ETH_PHY) implies
+                    (1 == CYGHWR_DEVS_ETH_PHY_KS8721) }
+
+    
     define_proc {
         puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_arm_sam7ex256.h>"
         puts $::cdl_header "/***** proc output start *****/"
@@ -67,4 +71,8 @@
         puts $::cdl_header "#define HAL_PLATFORM_EXTRA  \"\""
         puts $::cdl_header "/****** proc output end ******/"
     }
+    
+    # The AT91SAM7X provides one CAN channel and the Olimex SAM7-EX256 main board
+    # provides a connector for this channel
+    implements CYGINT_DEVS_CAN_AT91SAM7_CAN0
 }
diff -ruN -x 'Entries*' ecos_web_cvs/ecos/packages/hal/arm/at91/sam7ex256/current/src/sam7ex256_misc.c ecos/ecos/packages/hal/arm/at91/sam7ex256/current/src/sam7ex256_misc.c
--- ecos_web_cvs/ecos/packages/hal/arm/at91/sam7ex256/current/src/sam7ex256_misc.c	2007-01-08 20:07:42.000000000 +0100
+++ ecos/ecos/packages/hal/arm/at91/sam7ex256/current/src/sam7ex256_misc.c	2007-04-08 16:25:34.000000000 +0200
@@ -58,9 +58,52 @@
 //
 void hal_at91_led (int val)
 {
-     HAL_ARM_AT91_GPIO_CFG_DIRECTION(AT91_GPIO_PB20, AT91_PIN_OUT);
-     HAL_ARM_AT91_GPIO_PUT(AT91_GPIO_PB20, (val & 1));
+    HAL_ARM_AT91_GPIO_CFG_DIRECTION(AT91_GPIO_PB20, AT91_PIN_OUT);
+    HAL_ARM_AT91_GPIO_PUT(AT91_GPIO_PB20, (val & 1));
+}
+
+//
+// Initialisation of Micrel KS8721 ethernet phy
+//
+void hal_plf_eth_init(void)
+{
+   cyg_uint32 stat;
+
+   // Enable the PIOB Clock
+   HAL_WRITE_UINT32(AT91_PMC + AT91_PMC_PCER, AT91_PMC_PCER_PIOB);
+    
+   // PU = Enables PCS_LPBK mode at power-up / reset.
+   HAL_ARM_AT91_GPIO_CFG_DIRECTION(AT91_GPIO_PB15, AT91_PIN_IN);
+   HAL_ARM_AT91_GPIO_CFG_PULLUP(AT91_GPIO_PB15, AT91_PIN_PULLUP_DISABLE);
+   
+   // PU = Enables ISOLATE mode at power-up /reset.
+   HAL_ARM_AT91_GPIO_CFG_DIRECTION(AT91_GPIO_PB7, AT91_PIN_IN);
+   HAL_ARM_AT91_GPIO_CFG_PULLUP(AT91_GPIO_PB7, AT91_PIN_PULLUP_DISABLE);
+   
+   // PU = Enables RMII mode at power-up / reset
+   // TODO: The errata reports that the RMII mode for the SAM7X does not work.
+   //      It would probably still be a good idea to use the RMII/MII CDL 
+   //      configuration to select the appropriate mode here
+   HAL_ARM_AT91_GPIO_CFG_DIRECTION(AT91_GPIO_PB16, AT91_PIN_IN);
+   HAL_ARM_AT91_GPIO_CFG_PULLUP(AT91_GPIO_PB16, AT91_PIN_PULLUP_DISABLE);
+   
+   // PU = Enable RMII_BTB mode at power-up / reset.
+   HAL_ARM_AT91_GPIO_CFG_DIRECTION(AT91_GPIO_PB4, AT91_PIN_IN);
+   HAL_ARM_AT91_GPIO_CFG_PULLUP(AT91_GPIO_PB4, AT91_PIN_PULLUP_DISABLE);
+
+   // Power Down Mode = 1 = normal operation
+   HAL_ARM_AT91_GPIO_CFG_DIRECTION(AT91_GPIO_PB18, AT91_PIN_OUT);
+   HAL_ARM_AT91_GPIO_PUT(AT91_GPIO_PB18, 1);
+
+   // All the lines setup correctly. Now do a external reset and let the phy 
+   // start up in the correct mode
+   HAL_WRITE_UINT32(AT91_RST+AT91_RST_RMR,AT91_RST_RMR_KEY|(1<<0x8));
+   HAL_WRITE_UINT32(AT91_RST+AT91_RST_RCR,AT91_RST_RCR_KEY|AT91_RST_RCR_EXTRST);
 
+   do 
+   {
+     HAL_READ_UINT32(AT91_RST+AT91_RST_RSR,stat);
+   } while (!(stat & AT91_RST_RSR_NRST_SET));
 }